5 Question 6 Given the following SOP: F= E1.3,5,67) %3D Implement the SOP using the 74138 decoder given below and two inputs AND/NAND gates, the datasheet of the decoder is available here U1 YO Y1 G1 -G2A -G2B Y3 Y4 Y5 Y6 Y7 74LS138N 0125
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- Q3: Assume that you have to spread two signals A and B, using CDMA with the DSSS. The data of signals are Ad = 111 and Bd = 000. The key sequences are Ak = 010100 100010 110011, and Bk = 000110 101000 010111 If the binary "0" is assigned a positive signal value (+1), the binary "1" a negative signal value (-1), for the As and Bs. Find the following: 1. The results of spreading signals As and Bs. 2. The summation signal of As + Bs. 3. Find the output data values of As and Bs.H.w:-using an adder/subractor.cot to Canvert from BCD ade to Ex-3 Cde ?middle 4 digit letter 7 segment output 5206 EhJ EhJ5206 print that specific combination using one 7 segment display in a serial. the following should be included in the report. 1-- truth table 2--circuit =>general sop and pos =>simplified sop and pos =>using nand and nor gate =>using decoder =>using multiplexer 3-- conclusion and discussion
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- Q5. Design the Full Adder circuit using: i) only Half Adders and a OR gate, ii) only a single 3x8 DecoderQ3. b) Suppose you want to transmit the 10-bit message [101101101] by Pulse code Modulation (PCM). Using clearly labeled diagrams, show the encoding the bit sequence using the following PCM waveform types: i) Bipolar RZ Signal ii) RZ-AMI iii) Bi – o - L iv) Delay modulationDefine components and write a VHDL description of the circuit defined in "Using primitive gates, write a Verilog model of a circuit that will produce two outputs, s and c, equal to the sum and carry produced by adding two binary input bits a and b (e.g., s=1 and c=0 if a=0 and b=1)." .