4. In this question, we consider the relative performance obtained by running a particular with various caches installed between the memory and the CPU. program Consider the following C function: 1 char a [512], b[512] add arrays (O { register int i; for (i = 0; i < 511; i = i+1) { a[i+1] = a[i] + b[i]; // Work!! } (The register keyword tells the C compiler to reserve a register for the variable i; let's assume it keeps i in RO. What does this mean for us? The variable i is not stored in main memory- it's stored in the CPU; this mean that it never has to be pulled from main memory into the cache when the CPU accesses it. The char keyword allocates character arrays at fixed locations in memory, using 1 byte per character.) Recall that in C, an array is a contiguous chunk of memory. Therefore, in this code, array a starts at some address (say, 0×00A), and ends at (start address) + n-sizeof (char) address, where n is the number of elements and sizeof (char) is the number of bytes a char takes in memory (and in this example, we're using char because it's 1 byte and makes calculating simple!). For the following questions, assume that the memory can read or write 1 byte at a time. (a) Suppose, when the code is actually run, the array a starts at physical memory address 0x0100, and b is right after (that is, adjacent to) a in memory. What are the physical addresses of the first 5 elements of a? The first 5 elements of b?

Part (a) Above is the assembly code for the function declared as: tomato(int array[], int x, int y). Assume that“myarray” is an array of 500 integers, and the function is called as tomato(myarray, 5, 21).(i) How many times is the “slt” instruction executed? Justify your answer to receive credit. ((ii) How many times is the “lw” instruction executed? Justify your answer to receive credit. ?Part (b) Calculate the total number of cycles it takes to execute tomato(myarray, 5, 21). Show your work ?Part (c) What is the execution time in milliseconds for the tomato(myarray, 5, 21) function if the processor operates at60KHz? Show your workPart (d) Your manager claims that it is possible to achieve an overall speedup of 2.2x by optimizing the data memoryaccess time. Is this claim correct? If so how much speed up is necessary for the data memory accesses to achieve anoverall speedup of 2.2x?

1. Convert the following C code into MIPS assembly: void array_comp(int num) { int array [10]; int i; for (i=0; i= 0) return 1; else return 0; int sub (int a, int b) { return a-b; }