EEL 3307c Lab 3

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University of Central Florida *

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3307

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Electrical Engineering

Date

Apr 3, 2024

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docx

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12

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EEL 3307c Lab 3: Transistor Biasing Joshua Barshay and Lab Partner Ammar Mubarez Results Gathered on 2/7&14/23
1.0 Pre-Lab Results The prelab results can be viewed below: 2.0 Simulations Each of the circuits in the lab manual was simulated for each step of the experimental process described in the experimental procedure section of the lab manual. The first circuit that was simulated was figure 1b with R E =0. The results of the simulation with all required values can be seen below.
The second circuit that was simulated was figure 1b with R E =1.8kOhms. The results of the simulation with all required values can be viewed below. The next circuit that was simulated was figure 3 with the AC source and capacitor removed to calculate the Q point (as per instruction in the lab session). The results of this simulation with the values for the Q point can be seen below.
Finally the full circuit in figure 3 with the AC source and capacitor was simulated. The circuit diagram followed by the waveform of the node voltage outputs can be viewed below.
(V E in blue, V C in gray, and V CE in green) 3.0 Experimental Procedure and Results Gathered The circuit for figure 1b. was modeled on the breadboard. The resistor values used were those given in the pre-lab and the R E resistor was disconnected. I B , I C , and V CE were all measured (as a note I B refers to the base current, I C refers to the collector current, and V CE refers to the voltage from collector to emitter). The results that were obtained are listed below. I C :
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