Silicon carbide nanowires of diameter D = 15 nm can be grown onto a solid silicon carbide surface by carefully depositing droplets of catalyst liquid onto a flat silicon carbide substrate. Silicon carbide nanowires grow upward from the deposited drops, and if the drops are deposited in a pattern, an array of nanowire fins can be grown, forming a silicon carbide nano-heat sink. Consider finned and unfinned electronics packages in which an extremely small, 10 μm x 10 μm electronics device is sandwiched between two d = 100-nm-thick silicon carbide sheets. In both cases, the coolant is a dielectric liquid at 20°C. A heat transfer coefficient of h = 1.0 × 105 W/m²-K exists on the top and bottom of the unfinned package and on all surfaces of the exposed silicon carbide fins, which are each L = 300 nm long. Each nano-heat sink includes a 150 × 150 array of nanofins. Determine the maximum allowable heat rate that can be generated by the electronic device so that its temperature is maintained at T, < 75°C for (a) the unfinned and (b) the finned packages.

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Chapter8: Natural Convection
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Problem 8.42P
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silicon carbide (T ≈ 300 K): k = 490 W/m⋅K .

Silicon carbide nanowires of diameter D = 15 nm can be grown onto a solid silicon carbide surface by carefully
depositing droplets of catalyst liquid onto a flat silicon carbide substrate. Silicon carbide nanowires grow upward from
the deposited drops, and if the drops are deposited in a pattern, an array of nanowire fins can be grown, forming a
silicon carbide nano-heat sink. Consider finned and unfinned electronics packages in which an extremely small, 10 μm
x 10 μm electronics device is sandwiched between two d = 100-nm-thick silicon carbide sheets. In both cases, the
coolant is a dielectric liquid at 20°C. A heat transfer coefficient of h = 1.0 × 105 W/m²-K exists on the top and bottom
of the unfinned package and on all surfaces of the exposed silicon carbide fins, which are each L = 300 nm long. Each
nano-heat sink includes a 150 × 150 array of nanofins. Determine the maximum allowable heat rate that can be
generated by the electronic device so that its temperature is maintained at T, < 75°C for (a) the unfinned and (b) the
finned packages.
To, h
-W= 10 μm-
Th
Unfinned
(a) q₁ =
(b) 9₂ =
i
i
Th
Th
Nano-finned
W
W
Transcribed Image Text:Silicon carbide nanowires of diameter D = 15 nm can be grown onto a solid silicon carbide surface by carefully depositing droplets of catalyst liquid onto a flat silicon carbide substrate. Silicon carbide nanowires grow upward from the deposited drops, and if the drops are deposited in a pattern, an array of nanowire fins can be grown, forming a silicon carbide nano-heat sink. Consider finned and unfinned electronics packages in which an extremely small, 10 μm x 10 μm electronics device is sandwiched between two d = 100-nm-thick silicon carbide sheets. In both cases, the coolant is a dielectric liquid at 20°C. A heat transfer coefficient of h = 1.0 × 105 W/m²-K exists on the top and bottom of the unfinned package and on all surfaces of the exposed silicon carbide fins, which are each L = 300 nm long. Each nano-heat sink includes a 150 × 150 array of nanofins. Determine the maximum allowable heat rate that can be generated by the electronic device so that its temperature is maintained at T, < 75°C for (a) the unfinned and (b) the finned packages. To, h -W= 10 μm- Th Unfinned (a) q₁ = (b) 9₂ = i i Th Th Nano-finned W W
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