Figure 6-61 The 74x157 2-input, 4-bit multiplexer: (a) logic diagram; (b) traditional logic symbol. (1 (aEN L (b) 74x157 dEN 100 101 200 2Y 1D0 201 301 1D1 400 12 401 200 2Y 2D1 3Y (14) 4D0 4Y (1 401 Table 6-43 Inputs Outputs Truth table for a EN L S 1Y 2Y 3Y 4Y 74x157 2-input, 4-bit multiplexer. 1 1DO 2D0 3DO 4D0 1D1 201 3D1 401

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In the class, we learned the design of 74x157, a 2-input 4-bit multiplexer. Study its logic diagram (Figure 6-61) and truth table (Table 6-43). And design a 3-input, 5-bit multiplexer. The three data sources are (D04, D03, D02, D01, D00), (D14, D13, D12, D11, D10) and (D24, D23, D22, D21, D20), respectively. The selection bits are (S1, S0). The outputs are (Y4, Y3, Y2, Y1, Y0). No enable bit is needed. No active-low logic required. All outputs are zero when (S1, S0) = (1,1). 

(1) Write the truth table of the multiplexer 

(2) Draw a logic diagram of the multiplexer 

Note: In your truth table and logic diagram, all input/output signals and logic symbols need to be clearly and correctly labeled, or will receive zero points.

Figure 6-61 The 74x157 2-input, 4-bit multiplexer: (a) logic diagram;
(b) traditional logic symbol.
(1
(aEN L
(b)
74x157
dEN
100
101
200
2Y
1D0
201
301
1D1
400
12
401
200
2Y
2D1
3Y
(14)
4D0
4Y
(1
401
Table 6-43
Inputs
Outputs
Truth table for a
EN L S
1Y
2Y
3Y
4Y
74x157 2-input,
4-bit multiplexer.
1
1DO
2D0
3DO
4D0
1D1
201
3D1
401
Transcribed Image Text:Figure 6-61 The 74x157 2-input, 4-bit multiplexer: (a) logic diagram; (b) traditional logic symbol. (1 (aEN L (b) 74x157 dEN 100 101 200 2Y 1D0 201 301 1D1 400 12 401 200 2Y 2D1 3Y (14) 4D0 4Y (1 401 Table 6-43 Inputs Outputs Truth table for a EN L S 1Y 2Y 3Y 4Y 74x157 2-input, 4-bit multiplexer. 1 1DO 2D0 3DO 4D0 1D1 201 3D1 401
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