When comparing 7CH and 7CH, what is the difference between 7CH and 7CH? Where exactly in the computer's memory is bit address 7CH stored?

For a 512k x 32 memory system, what is the data width at each address location? 19 32 512k 16M

How many distinct types of addressing exist in a computer network?

Given a computer with 300 memory locations, each 18-bit assessable, how many bits of addressing are needed?  Given a computer with 10-bit addressability and 5 bits for the address, what's the maximum number of memory this computer can have in bits?

If each interval shown in Figure 7.11 is 50ns, how long would it take to transfer 10 bytes of data? Devise a bus protocol, using as many control lines as you need, that would reduce the time required for this transfer to take place. What happens if the address lines are eliminated and the data bus is used for addressing instead? (Hint: An additional control line may be needed.)