two-input logic gate produces a output of logic HIGH, only if both inputs are different, then th ) а. IC 7408 D a. Ob. IC 7486 IC 7432 Od. IC 7400

Design the following combinational logic circuit with a four-bit input and a three-bit output. The input represents two unsigned 2-bit numbers: A1 A0 and B1 B0. The output C2 C1.C0 is the result of the integer binary division A1 A0/B1 B0 rounded down to three bits. The 3-bit output has a 2-bit unsigned whole part C2 C1 and a fraction part CO. The weight of the fraction bit CO is 21. Note the quotient should be rounded down, i.e. the division 01/11 should give the outputs 00.0 (1/3 rounded down to 0) not 00.1 (1/3 rounded up to 0.5). A result of infinity should be represented as 11.1. A minimal logic implementation is not required. (Hint: start by producing a truth table of your design).

NPN and PNP transistors can be found in logic gates belonging to logic families. Оа. MOS O b. ECL О с. СМОS O d. TTL

%V III. العنوان specties Lyles A 2. What is the relation between inputs & the carry outputs in half adder? 3. What are the relations between the outputs of figures in step 3 and step 4? 4. What is the relation between inputs & the sum output in half adder? 5. What is the purpose of half adder and full adder logic circuits? 6. Design the logic circuit of a 4-bit adder (ripple carry adder) 7. Draw the logic diagram of a five-bit parallel adder circuit using full adders. 8. What is the purpose of ripple carry adder circuit? 9. Design aa full adder circuit using 3 to 8 decoder. ||| ב ཡ] full CIC ۹:۳۱ >