The slab allocation algorithm uses a separate cache for each different object type. Assuming there is one cache per object type, explain why this doesn't scale well with multiple CPUS. What could be done to address this scalability issue?

We consider a virtual memory design for a computer architecture. Suppose that the byte- addressed computer has 256 bytes pages, 16-bit virtual addresses, and 16-bit page table entries (PTE) (NUM 1 bits of one PTE are used for reference, valid checking, protection mechanism, etc.). The computer uses two-level hierarchical page tables. 1. How many virtual pages can be addressed by the architecture? 2. What is the maximal size of the physical memory that can be supported by the architec- ture? 3. We are now running a program which is using 300 bytes of memory currently. What is the smallest possible number of PTES to store the running program?

We will explore the impact of cache capacity on performance, focusing exclusively on the data cache and excluding instruction storage in the caches. Cache access time is directly linked to its capacity. For the sake of simplicity, let's assume that accessing the main memory takes 100ns, and in a specific program, 50% of instructions involve data access. Two distinct processors, denoted as P1 and P2, are engaged in executing this program. Each processor is equipped with its own L1 cache. L1 size L1 Miss Rate L1 Hit Time P1 64 KB 3.6% 1.26 ns P2 128 KB 3.1% 2.17ns (a) What is the AMAT for P1 and P2 assuming no other levels of cache?

The simulated Pep/9 hardware has 64K of memory. But how is it put to use? So far, just 0x0030 memory has been written. So, what's the deal with all of that additional RAM? Pep/9 knows what to do with each memory location. Another viewpoint Only "global" variables were used. What effect would using "local" variables have? What distinguishes them? (Think "stack").