Database System Concepts
7th Edition
ISBN: 9780078022159
Author: Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher: McGraw-Hill Education
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Stella designs a 3 GHz processor where two important programs, A and B, take one second each to execute. Each
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- You are part of the CPP team tasked with designing a new processor. This processor operates at a clock speed of 200 MHz. You have the following hypothetical instruction frequencies for Benchmark B and the number of cycles these instructions take: ⚫ Instruction Class A: 50% of instructions, 1 cycle each ⚫ Instruction Class B: 30% of instructions, 2 cycles each ⚫ Instruction Class C: 20% of instructions, 3 cycles each Assuming the processor executes one instruction at a time, what is the average cycles per instruction (CPI) for this processor with the given mix of instruction classes? 1.7 CPI 2.5 CPI ○ 1.5 CPI ○ 2.0 CPIarrow_forwardSuppose two CPU A and B have exactly the same circuits, but different clock frequencies. Answer the following questions: a) If the clock frequency of CPU A is 8MHz, how long is one clock cycle of CPU A? b) If the CPU A can execute 0.4 million instructions per second on average, how long is the average time to execute one instruction? c) What is the average number of clock cycle to execute one instruction for CPU A? d) The frequency of CPU B is 12MHz. What is the average number of instructions that can be executed per second?arrow_forwardConsider a CPU that operates with a data transfer rate of 30 Mbytes/s. The data is transferred byte-wise and the CPU has to transfer 30bytes of data, and the size of the Status register is 4 bytes. What is the total time needed to perform the data transfer?arrow_forward
- Your favorite computer program (after being converted to MIPS assembly code, then to machine code) results in 2.5e8 instructions. Consider the three different CPUs and their clock rates and CPIs and determine how much time it would take each of them to execute this program. Lawrence’s computer with a clock rate of 3.32 Ghz and a CPI of 1.2.arrow_forwardSuppose we had a processor design with 5 stages where each stage takes the following amount of time: IF: 400 ps ID: 200 ps EX: 300 ps MEM: 500 ps WB: 200 psQ1: If you choose a pipelined design, what is the CPI? Assume that we have enough instructions such that the brief ramp up period at the beginning and the ramp down period at the end with less than 100% utilization does not matter. Q2: If you choose a pipelined design, what is the average execution time per instruction in picoseconds?arrow_forwardYour favorite computer program (after being converted to MIPS assembly code, then to machine code) results in 2.5e8 instructions. Consider the three different CPUs and their clock rates and CPIs and determine how much time it would take each of them to execute this program. Rick Sanchez’s computer with a clock rate 7.99 Hz (hertz, not gigahertz) and a CPI of 1.1.arrow_forward
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