Rp2 Rp1 H- Vout R M2 Cp2 M1 HT CG Vin Csi Rs2 Cs2 R, R$1 Vss = 0 V Figure 5

Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
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How do we know that with amplification with emitter degenerate resistor amplifier both M1 and M2 are in the saturation region?
VDD
Rp2
V out
R1
Rp1
M2
Cp2
M1
Vin H
CG
Rs2
Cs2
Rsi
Csi
R2
Vss = 0 V
Figure 5
Transcribed Image Text:VDD Rp2 V out R1 Rp1 M2 Cp2 M1 Vin H CG Rs2 Cs2 Rsi Csi R2 Vss = 0 V Figure 5
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