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Rc RC Ссвы 2 k2 2 k2 Ccsi Ces2 Сси Сскеа VREF I1.7 k2 42 k2 42 k2 -VFE = -5.2 V

Power System Analysis and Design (MindTap Course List)

6th Edition

ISBN:9781305632134

Author:J. Duncan Glover, Thomas Overbye, Mulukutla S. Sarma

Publisher:J. Duncan Glover, Thomas Overbye, Mulukutla S. Sarma

Chapter3: Power Transformers

Section: Chapter Questions

Problem 3.30P: Reconsider Problem 3.29. If Va,VbandVc are a negative-sequence set, how would the voltage and...

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Question

What are the delay and power-delay product for the ECL gate as shown if IEE is changed to 0.5 mA, but the logic swing is maintained the same?

Rc
RC
Ссвы
2 k2
2 k2
Ccsi
Ces2
Сси
Сскеа
VREF
I1.7 k2
42 k2
42 k2
-VFE = -5.2 V

Expert Solution

Step 1

Determining delay of the ECL gate is

Determining effective load capacitance for collector mode

Determining load resistance

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