Provide the full MARIE RTN for these new MARIE operations. Include the fetch, decode, operand fetch (if necessary), execution and store result (if necessary) stages. X is a main memory address (the last 12 bits of the 16-bit instruction) and should be referenced as IR[11..0] in your RTN. LoadIndex X – this is a load where a datum is loaded into the AC, but the address of the datum is not X, instead it is computed by fetching the address at memory location X and adding that value to the address of the value currently stored in a special register called R1. Using the textbook’s notation, we are performing AC  M[R1+M[X]] meaning that we get the item at location X, add it to R1, and use that sum as the address to fetch the datum. Assume the ALU can directly access values in the AC, MBR and R1.

Assign the register numbers for all the variables. You are encouraged to refer the MIPS assembly registers. (2) Select appropriate assembly instructions for arithmetic operations and if/else statements. (3) Once you have the assembly instructions for arithmetic operations and if/else statement, pair up these instructions with beq/bne and j instructions. If the condition has equality comparison, you may need to slt instruction. Using slt instruction, you can set a temporary value (t) to 1 and branch to the next instruction with beq/bne instruction. (4) Finally, add the comments for each instruction line to clarify. Assume the integer variables g and h are in registers $s2 and $s3, respectively. if (g > h)               g = g + h;else               g = g – h; if (g >= h)               g = g + 1;else               h = h – 1; if (g <= h)               g = 0;else               h = 0;

Q5 Please convert the following C/C++ function to RISC-V assembly (RV321). Function: swap Registers: ra = x1 (return address) &v[0] -> a0 = x10 (arguments/return values) k-> a1 = x11 (arguments/return values) to = x5 (temporary) t1 = x6 (temporary) t2 = x7 (temporary) hint: void swap(int v[], int k) { int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; %3D }

Q3. Provide the hexadecimal representation of the following instruction.-- sd x17, 61 (x30) Ans: