ou are given a main memory of 64Mbytes with each byte addressable and asked to design a cache memory using direct mapping. The main memory is organized as blocks of 8bytes. The cache memory must have a size of 512Kbytes.

I have a little bit problem with my late quiz for computer architecture, I get the answer from my lecturer but I still don't feel fully understand, can I ask for some help: In a computer system, the memory has 32 blocks and the cache has 8 blocks. Assume there is only one word per block with 4 bytes in one word. The reference sequence in terms of word location is 0, 2, 4, 10, 5, 12, 8, 18, 13. If the cache is direct-mapped, how many misses do we have if the cache is initially empty? Can you give the hit or miss for each reference?

In a certain computer, the virtual addresses are 32 bits long and the physical addresses are 48 bits long. The memory is word addressable. The page size is 16 kB and the word size is 2 bytes. The Translation Look-aside Buffer (TLB) in the address translation path has 64 valid entries. Hit ratio of TLB is 100% then maximum number of distinct virtual addresses that can be translated is K.

Suppose we have a byte-addressable computer with a cache that holds 8 blocks of 16 bytes each.  Assuming that each memory address has 16 bits, to which cache block would the hexadecimal address 0x13F map if the computer uses direct mapping? Blocks are numbered starting at 0.

Question 4

A 2-way set associative cache consists of four sets. Main memory contains 2K blocks of eight words each. Show the main memory address format that allows us to map addresses from main memory to cache. Be sure to include the fields as well as their sizes. Compute the hit ratio for a program that loops 6 times from locations 8 to 51 in main memory. You may leave the hit ratio in terms of a fraction. Please show details how you obtain the result.

If we had a computer that can only address data in bytes, but it has fully associative mapping, 16-bit main memory addresses, and 32-bit cache memory blocks. If each block is 16 bytes in size, then...(a) Count the number of bytes in the offset field.The tag field's size in pixels must be calculated (b).

Suppose we have a byte-addressable computer with a cache that holds 8 blocks of 4 bytes each.  Assuming that each memory address has 8 bits, to which cache block would the hexadecimal address 0x2D map if the computer uses direct mapping? Blocks are numbered starting at 0

Suppose a computer using fully associative cache has 224 bytes of byte-addressable main memory and a cache of 128 blocks, where each block contains 64 bytes.Q.) To which cache block will the memory address 0x01D872 map?

Suppose a computer using fully associative cache has 224 words of main memory and a cache of 512 blocks, where each cache block contains 16 words. How many blocks of main memory are there? What is the format of a memory address as seen by the cache, i.e., what are the sizes of the tag and offset fields? To which cache block will the memory reference 17042416 map?