int total; int i; total = 0; for (i = 10; i > 0; i--) { totali; } The following translates this into ARM assembler: /* -- sum-to-ten.s */ .text .global start _start: end: mov re, #0 mov r1, #10 again: @re: 0 @r1 = 10 add re, re, r1@re: re + r1 r1 - 1 subs r1, r1, #1 @ r1 bne again. @loop again if we haven't hit zero. mov r7, #1 swie @setup exit @exit In the above assembly language program, we first use the MOV instruction to initialize RO at 0 and R1 at 10. The ADD instruction computes the sum of RO and R1 (the second and third arguments) and places the result into RO (the first argument); this corresponds to the total += i; line of the equivalent C program. Note the use of the label at the beginning of the ADD instruction. The label is simply the relative memory address of where that instruction is when the assembler loads it into memory. The subsequent SUBS instruction decreases R1 by 1. To understand the next instruction, we need to understand that in addition to the registers RO through R15, the ARM processor also incorporates a set of four "flags," labeled the zero flag (Z), the negative flag (N), the carry flag (C), and the overflow flag (V). Whenever an arithmetic instruction has an S at its end, as SUBS does, these flags will be updated based on the result of the
int total; int i; total = 0; for (i = 10; i > 0; i--) { totali; } The following translates this into ARM assembler: /* -- sum-to-ten.s */ .text .global start _start: end: mov re, #0 mov r1, #10 again: @re: 0 @r1 = 10 add re, re, r1@re: re + r1 r1 - 1 subs r1, r1, #1 @ r1 bne again. @loop again if we haven't hit zero. mov r7, #1 swie @setup exit @exit In the above assembly language program, we first use the MOV instruction to initialize RO at 0 and R1 at 10. The ADD instruction computes the sum of RO and R1 (the second and third arguments) and places the result into RO (the first argument); this corresponds to the total += i; line of the equivalent C program. Note the use of the label at the beginning of the ADD instruction. The label is simply the relative memory address of where that instruction is when the assembler loads it into memory. The subsequent SUBS instruction decreases R1 by 1. To understand the next instruction, we need to understand that in addition to the registers RO through R15, the ARM processor also incorporates a set of four "flags," labeled the zero flag (Z), the negative flag (N), the carry flag (C), and the overflow flag (V). Whenever an arithmetic instruction has an S at its end, as SUBS does, these flags will be updated based on the result of the
Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
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