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- For a microprocessor similar to ATmega328p an 8 bit ADC uses a VREF = 3.3 V. When an analog read is executed the return value is 112. What Voltage is present on the input? Enter the value in the box provided in mV. Round to the nearest mV.Figure Q2(e) shows a programmable logic array (PLA) unit with two inputs, four columns, and three outputs. Show the steps to implement a one-bit comparator using this PLA. Note that the output should have equal (EQ), less than (LT), and greater (GT) status. A, 02 Figure Q2(e)We want to design a circuit to detect prime numbers.The input of the circuit is a 4-bit binary number and the output is a single bit and should show one when the number is prime and zero otherwise.B. Implement the circuit using a 4× 1 multiplexer and combinational logic gates.C. Implement the circuit using only one decoder and one OR gate. What is the size of the decoder you use?
- Q4) 1) Design a four-bit binary synchronous counter with D flip-flops. 2) Design a four-bit binary ring counter with T flip-flops. 3) Design a four-bit binary Johnson counter with T flip-flops. 4) Design a combinational circuit that compares two 4-bit numbers to check if they are equal. The circuit output is equal to 1 if the two numbers are equal and 0 otherwise 5) Design an excess-3-to-binary decoder using the unused combinations of the code as don't-care conditions 6) Draw the logic diagram of a 2-to-4-line decoder using (a) NOR gates only and (b) NAND gates only. Include an enable input 7) Design a BCD-to-decimal decoder using the unused combinations of the BCD code as don't-care conditions.DIGITAL LOGIC DESIGN Are the following addition results Overflow or underflow and why?ehcu.org/pluginfile 100% 10 / 11 locations, count how many times is 0 and how many times 1 is. Questions:- 1- Write a program in assembly language to perform the following logic ci BL CL DL [5100]- 2- How we can perform the NEG and NOT instructions by using different instructions. 3- Write the following program by using different instruction or instructions for each instruction on the program. MOV AL , 00 MOV BX , FFFF XOR CL , FF NEG BYTE PTR [DI] AND CX , LG
- Q2) A) Express the decimal number (- 30 ) as an 8-bit number in 2's complement form, and verifying its decimal value. B) Design an Octal-to-Binary (8-to-3) Encoder, and then draw a block diagram for Octal-to- Binary Encoder.Using the DC operating conditions from the following table, give the noise margin HIGH (NMH) for the 74HC logic family with Vcc=+3.4v. DC Operating Conditions for a Sample of 7400 Series Logic Families DC Operating Condition Logic Family Speed (MHz) Year Vcc VOHmax VOHmin VOLmax VOLmin VIHmax VIHmin ILmax VILmin Ic lomax (H/L) Orig. (TTL) 1964 +5 +5 +2.4 +0.4 GND +5 +2 +0.8 GND 40m -4/+16m 25 LS (TTL) 1976 +5 +5 +2.4 +0.4 GND +5 +2 +0.8 GND 8.8m -4/+8m 40 HC (CMOS) 1982 +2-6 Vcc 0.8.Vcc 0.33 GND Vcc 0.7.Vcc 0.3.Vcc GND 40u +/-25m 50 AC (CMOS) 1985 +2-6 Vcc 0.8.Vcc 0.33 GND Vcc 0.7 Vcc 0.3.Vcc GND 80u +/-50m 125 Note 1: All voltage specifications have units of volts. All current specifications have units of amps. Note 2: The Vo and V, specifications for the AC and HC logic families are worst case and vary depending on the Vcc selection and the output current. Note 3: All specifications are given for the commercial temperature range (74 series). 1.17v 0.5v 0.34v 0.4vQuestion 3: a) Design a circuit which will add a 4-bit binary number to a 5-bit binary number. Use five full adders. Assume negative numbers are represented in 2's complement. (Hint: How do you make a 4-bit binary number into a 5-bit binary number, without making a negative number positive or a positive number negative?) b) A half adder is a circuit that adds two bits to give a sum and a carry. Give the truth table for a half adder, and design the circuit using only two gates. Then design a circuit which will find the 2's complement of a 4-bit binary number. Use four half adders and any additional gates. (Hint: Recall that one way to find the 2's complement of a binary number is to complement all bits, and then add 1.)
- .Provide a detailed report on the combinational logic circuits below. 1. Magnitude Comparators a. What are magnitude comparators? b. How does it work? c. Applications of magnitude comparators.Please provide Handwritten answer Question: You must only use DIL chips in your design! No logic gates! 1) 4-bit addition using an 4-bit full adder 74LS83.1. Floating Point Numbersa. Show the difference between IEEE 16, 32, 64, 128-bit floating-point numbers.b. Express the following numbers in hexadecimal IEEE 32-bit floating-pointformat. i. 320ii. -622. Design a circuit that implements function p below using AND, OR, and NOT gates.DO NOT change the form of the equation. ?(?0, ?1, ?2, ) = {?2(?0?1 + ?̅0?̅1)}. (?̅2 + ?̅1)4. Show how the unsigned serial multiplication method would compute M × Q where M = 10110and Q = 01101. M and Q are unsigned numbers. For each step, describe in words what is happening (shift left, shift right, add/subtract M or Q into product, set a bit, etc.), and showthe product (or partial product) for that step. (Note: Q is the multiplier and M is themultiplicand.)