HALF ADDER: A combinational logic circuit that performs the addition of two bits and produces the sum and carry is called a half adder as shown in Fig 1. In half adders, only two inputs are considered as operands; carry inputs are ignored. A B Half Adder Digital Logic Design A (SWI) 0 0 1 1 SW 1 SW 1. Connect the circuit as shown in Fig. 2 and record your data in table 1. A B INPUTS SUM Cout Figure 1 B (SWO) 0 1 0 1 2 Figure. 2 Table 1 Sum (LO) OUTPUTS What is the relation between inputs & the carry outputs? SUM What is the relation between inputs & the sum output? Cout L₁ Cout (L1)

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A.
Digital Logic Design
HALF ADDER:
A combinational logic circuit that performs the addition of two bits and produces the sum and
carry is called a half adder as shown in Fig 1. In half adders, only two inputs are considered
as operands; carry inputs are ignored.
A
B
Half
Adder
A (SWI)
0
0
1
1
1. Connect the circuit as shown in Fig. 2 and record your data in table 1.
SW 1
SWo
A
B
INPUTS
SUM
Cout
Figure 1
B (SWO)
0
1
0
1
D
Figure. 2
Table 1
Sum (LO)
OUTPUTS
Q1. What is the relation between inputs & the carry outputs?
SUM
Q2. What is the relation between inputs & the sum output?
Cout
L₁
Cout (L1)
Transcribed Image Text:A. Digital Logic Design HALF ADDER: A combinational logic circuit that performs the addition of two bits and produces the sum and carry is called a half adder as shown in Fig 1. In half adders, only two inputs are considered as operands; carry inputs are ignored. A B Half Adder A (SWI) 0 0 1 1 1. Connect the circuit as shown in Fig. 2 and record your data in table 1. SW 1 SWo A B INPUTS SUM Cout Figure 1 B (SWO) 0 1 0 1 D Figure. 2 Table 1 Sum (LO) OUTPUTS Q1. What is the relation between inputs & the carry outputs? SUM Q2. What is the relation between inputs & the sum output? Cout L₁ Cout (L1)
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