For the following RISC-V assembly instructions below, what is a single corresponding C statement? Assume f, g, h, i are in x18, x19, x20 and x21. Your answer must be one single C statement for all assembly instructions as opposed to one C statement for each assembly instruction. add x18, x19, x20 sub x18, x18, x21

Convert following x86-64 assembly language function into C code f2: addl %edx, %esi movslq %esi, %rsi movl (%rdi,%rsi,4), %eax ret

On an ARM processor, assuming that [N-bit] = 0, [Z-bit] = 0, [C-bit] = 1, [V-bit] = 1, predict whether each of the following branch instruction is going to make the flow of control branch to the instruction labeled by NEXT (i.e., YES or NO). (These instructions are NOT executed one after the other one; instead, each instruction starts with the initial conditions given in the statement.) (a) BLS NEXT (b) BNE NEXT (c) BLE NEXT (d) BVC NEXT

3. Suppose M8=x and M9=y. After each instruction has been executed, what is the content of the location indicated in column 3? Fill the contents in the table. Address M1 Content MMR M8 R1 MMR M9 R2 Locations Register 1 Register 2 Accumulator M7 Content М2 M3 ADD R1 R2 М4 МАМ M7 M5 HLT M7

For the whole question, pseudo-instructions are not allowed except “j target_label”and “jr ra”. One suggestion for assembly programming problems is that you can includecomments to one or a block of instructions. Consider a RISC-V assembly function func1. func1 has three passingarguments stored in registers a0, a1 and a2, uses temporary registers t0-t3 andsaved registers s4–s10. func1 needs to call func2 and other functions may call func1also. func2 has two passing arguments stored in registers a0 and a1, respectively. Infunc1, after the program returns to func1 from func2, the code needs the originalvalues stored in registers t1 and a0 before it calls func2. (a) How many words are the stack frames of function func1?(b) Indicate which registers are stored on the stack of func1.

An 'instruction fetch/read' results in three sets of numbers that go to the Registers Block as studied in class. These three numbers in the instruction represent bits 25-21 for 'Read Register 1', bits 20-16 for 'Read Register 2', and bits 15-11 for the 'Write Register'. What does the 5 bits width of each of these indicate? a. That the word is 15 bits long in this architecture b. That each word is 32 bits long c. That there are 32 registers that can be addressed in this architecture d. That there are 15 registers that can be addressed in this architecture

Draw a diagram showing the relationship of the EDX, DX, DL and DH registers. Page 29 shows EAX that you can follow as a template. Template attached

Write an assembly code to assign the register BX with 4014H, and register DX with 4028 H. Move the content of BX to DX, und verse versa. Then, copy the now value of low content for BX and DX .to memory location [2131 H], and [2139H]

Assume that before the instruction is executed, the flags are CF=0, ZF=0 and SF=0 and the Registers have the values AL=0x86, BL=0x81, CL=0x37 and DL=0x87. What are the values of the flags after the instruction OR DL, DL executes? CF = ZF = SF =

True or false