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Five different CMOS differential amplifier circuits are shown below. Use intuitive approach of finding the small signal current caused by the application of a small signal input voltage vin, and write by inspection the approximate small signal output resistance, Rout, seen looking back into each amplifier and the approximate small signal differential voltage gain, vout/Vin. Leave your answer in terms of gmi and gau (i=1 thru' 8)

Five different CMOS differential amplifier circuits are shown below. Use intuitive approach of finding the small signal current caused by the application of a small signal input voltage vin, and write by inspection the approximate small signal output resistance, Rout, seen looking back into each amplifier and the approximate small signal differential voltage gain, vout/Vin. Leave your answer in terms of gmi and gau (i=1 thru' 8)

Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
Section: Chapter Questions
Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...
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The image presents five different CMOS differential amplifier circuits labeled I through V. These circuits are used to investigate the small signal current caused by a small signal input voltage \(v_{in}\). The task is to determine the approximate small signal output resistance, \(R_{out}\), and the small signal differential voltage gain, \(v_{out}/v_{in}\), for each amplifier. The results should be expressed in terms of the transconductance \(g_{mi}\) and output conductance \(g_{dsi}\). **Circuit Descriptions:** 1. **Circuit I:** - Comprised of transistors \(M_1\), \(M_2\) connected to a current source \(I_T\). The output voltage is taken from the drains of \(M_1\) and \(M_2\). 2. **Circuit II:** - Similar to Circuit I with an additional transistor \(M_3\) connected in a diode configuration, and a load represented by a transistor \(M_4\) providing a more complex response. 3. **Circuit III:** - Incorporates a diode-connected load transistor \(M_3\) and a differential pair of transistors \(M_1\), \(M_2\) with the output taken across them. 4. **Circuit IV:** - Uses transistors \(M_5\) and \(M_6\) as active loads with a differential configuration similar to Circuit III. 5. **Circuit V:** - Features additional cascoding with transistors \(M_5\) and \(M_6\) added on top of the differential pair \(M_1\) and \(M_2\). Transistor \(M_7\) provides a biasing voltage \(V_{BN}\). For each circuit, the input \(v_{in}\) is applied to the gates of the differential pair while the common-mode current source \(I_T\) provides biasing. The circuits are powered by \(V_{DD}\) as the positive supply rail and \(V_{SS}\) as the negative supply rail. The task involves understanding the intuition behind the circuit functions to estimate their gain and output resistance analytically.
Transcribed Image Text:The image presents five different CMOS differential amplifier circuits labeled I through V. These circuits are used to investigate the small signal current caused by a small signal input voltage \(v_{in}\). The task is to determine the approximate small signal output resistance, \(R_{out}\), and the small signal differential voltage gain, \(v_{out}/v_{in}\), for each amplifier. The results should be expressed in terms of the transconductance \(g_{mi}\) and output conductance \(g_{dsi}\). **Circuit Descriptions:** 1. **Circuit I:** - Comprised of transistors \(M_1\), \(M_2\) connected to a current source \(I_T\). The output voltage is taken from the drains of \(M_1\) and \(M_2\). 2. **Circuit II:** - Similar to Circuit I with an additional transistor \(M_3\) connected in a diode configuration, and a load represented by a transistor \(M_4\) providing a more complex response. 3. **Circuit III:** - Incorporates a diode-connected load transistor \(M_3\) and a differential pair of transistors \(M_1\), \(M_2\) with the output taken across them. 4. **Circuit IV:** - Uses transistors \(M_5\) and \(M_6\) as active loads with a differential configuration similar to Circuit III. 5. **Circuit V:** - Features additional cascoding with transistors \(M_5\) and \(M_6\) added on top of the differential pair \(M_1\) and \(M_2\). Transistor \(M_7\) provides a biasing voltage \(V_{BN}\). For each circuit, the input \(v_{in}\) is applied to the gates of the differential pair while the common-mode current source \(I_T\) provides biasing. The circuits are powered by \(V_{DD}\) as the positive supply rail and \(V_{SS}\) as the negative supply rail. The task involves understanding the intuition behind the circuit functions to estimate their gain and output resistance analytically.
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