Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN: 9780133923605
Author: Robert L. Boylestad
Publisher: PEARSON
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6:21 A D lll all 23 < Electronic Course-ll Lecture 2 Volt. Q KIN(BASE) EquaIUn - IE This is the effective load on the voltage divider illustrated in Figure 5–11. You can quickly estimate the loading effect by comparing RiN(BASE) to the resistor R2 in the voltage divider. As long as RiNBAsE) is at least ten times larger than R2, the loading effect will be 10% or less and the voltage divider is stiff. If RIN(BASE) is less than ten times R2, it should be combined in parallel with R2. Stif: ResmAS, 1OR; +Vc FIGURE 5-11 Voltage divider with load. ReenASE looking in at base of transistor Not stiff: RINBASE) < 1OR, R: || RINBASE) RINBASE EXAMPLE 5-3 Determine the de input resistance looking in at the base of the transistor in Figure 5-12. Bpc = 125 and Vg = 4 V. FIGURE 5-12 +Ver Rc 4 V SRE $ 1.0 k VB - 0.7 V 3.3 V Solution 3.3 mA RE 1.0 kn BocVB 125(4 V) RIN(BASE) = 3.3 mA 152 kN Related Problem What is RINBASE) in Figure 5-12 if Bpc = 60 and Vg = 2 V? Thevenin's Theorem Applied to Voltage-Divider Bias To analyze a voltage-divider biased transistor circuit for base current loading effects, we will apply Thevenin's theorem to evaluate the circuit. First, let's get an equivalent base- emitter circuit for the circuit in Figure 5–13(a) using Thevenin's theorem. Looking out from the base terminal, the bias circuit can be redrawn as shown in Figure 5–13(b). Apply Thauanin'e thanam tn tha ninnit laft of nnint A uith V ranlanad hu a chat ta neund and Play Projection Show notes Edit
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Transcribed Image Text:6:21 A D lll all 23 < Electronic Course-ll Lecture 2 Volt. Q KIN(BASE) EquaIUn - IE This is the effective load on the voltage divider illustrated in Figure 5–11. You can quickly estimate the loading effect by comparing RiN(BASE) to the resistor R2 in the voltage divider. As long as RiNBAsE) is at least ten times larger than R2, the loading effect will be 10% or less and the voltage divider is stiff. If RIN(BASE) is less than ten times R2, it should be combined in parallel with R2. Stif: ResmAS, 1OR; +Vc FIGURE 5-11 Voltage divider with load. ReenASE looking in at base of transistor Not stiff: RINBASE) < 1OR, R: || RINBASE) RINBASE EXAMPLE 5-3 Determine the de input resistance looking in at the base of the transistor in Figure 5-12. Bpc = 125 and Vg = 4 V. FIGURE 5-12 +Ver Rc 4 V SRE $ 1.0 k VB - 0.7 V 3.3 V Solution 3.3 mA RE 1.0 kn BocVB 125(4 V) RIN(BASE) = 3.3 mA 152 kN Related Problem What is RINBASE) in Figure 5-12 if Bpc = 60 and Vg = 2 V? Thevenin's Theorem Applied to Voltage-Divider Bias To analyze a voltage-divider biased transistor circuit for base current loading effects, we will apply Thevenin's theorem to evaluate the circuit. First, let's get an equivalent base- emitter circuit for the circuit in Figure 5–13(a) using Thevenin's theorem. Looking out from the base terminal, the bias circuit can be redrawn as shown in Figure 5–13(b). Apply Thauanin'e thanam tn tha ninnit laft of nnint A uith V ranlanad hu a chat ta neund and Play Projection Show notes Edit
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