Design a 3Bit Even Parity Bit Generator using: a) Multiplexer b) Decoder and appropriate gates
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Design a 3Bit Even Parity Bit Generator using:
a) Multiplexer
b) Decoder
and appropriate gates
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- parity generator design, construct and test a circuit that generates an even parity bit ffrom four messages bits . use XOR gates. adding one more XOR gate, expand the circuit so that it generates an odd parity bit also.2. Design a parity checker circuit for a 4-bit data.B) Design 3-bit odd parity checker. (using Boolean algebra)
- Consider two binary numbers where the first is made of three bits whichcan be represented by X, Y, and Z, while the second is two bits and isrepresented by A and B. Design a logic circuit that multiplies X Y Z timesA B, using two half adders, one full adder in addition to AND gates.Scenario: In a biased N-bit binary number system with bias B, positive and negative numbers are represented as their value plus the bias B. For example, for 5-bit numbers with a bias of 15, the number 0 is represented as 01111, 1 as 10000, and so forth. Biased number systems are sometimes used in floating point mathematics. Consider a biased 8-bit binary number system with a bias of 12710 Question: What is the representation and value of the most positive number?Calculus Design a circuit that generates even parity for a 4-bit input: a. Using a single multiplexer with least number of inputs (3 Marks). b. Using exclusive-OR gates only
- 7. Convert these decimal numbers first to hexadecimal, then binary, then octal, then back to decimal. As a check the final answer should agree with the original number. a) 23.48 b) 4.16 c) 28.28 8. Convert these decimal numbers first to 6 bit signed 2's complement binary. Then find the 2's complement of each number. Finally, add the two binary numbers (pos/ neg) together (should = 0) a) 23 b) -31 c) -17 9. Compute the following decimal arithmetic problems in 8 bit signed binary a) 93-63 b) -31+111 c) 17-128 10. What range of decimal numbers can be expressed in the following number systems? a) 8 bit signed 2's complement? b) 8 bit unsigned binary c) 16 bit signed 2's complement? d) 16 bit unsigned binary.Q2: For BCD code perform the following, with and without complement: 1. 1000010110 is subtracted from 10101000001. 2. 759 be subtracted from 645.Question 3: a) Design a circuit which will add a 4-bit binary number to a 5-bit binary number. Use five full adders. Assume negative numbers are represented in 2's complement. (Hint: How do you make a 4-bit binary number into a 5-bit binary number, without making a negative number positive or a positive number negative?) b) A half adder is a circuit that adds two bits to give a sum and a carry. Give the truth table for a half adder, and design the circuit using only two gates. Then design a circuit which will find the 2's complement of a 4-bit binary number. Use four half adders and any additional gates. (Hint: Recall that one way to find the 2's complement of a binary number is to complement all bits, and then add 1.)
- A 4-bit parallel adder can add ___________ a. Four bits in sequence b. Two 2-bit binary numbers c. Four bits at a time d. Two 4-bit binary numbersAttach the proper even parity bit to the :following codes a) 11010 b) 1001 c) 0111101. Design a combinational circuit to convert a 4-bit binary number to gray code using(a) standard logic gates,(b) decoder,(c) 8-to-1 multiplexer,(d) 4-to-1 multiplexer.