Derive the Boolean expression for the gate structure that clears the sequence counter SC to 0. Draw the logic diagram of the gates and show how the output is connected to the lNR and CLR inputs of SC (see Fig. 5-6). Minimize the number of gates.

2. Consider the circuit below. a. Write the Boolean expression for output F in terms of A, B and C. b. Construct a truth table for the circuit with A as MSB and C as LSB. c. Write the Canonical SOP and POS forms for output F. A B C 3. Draw the logic circuit represented by the expression F(A, B) = AB using no more than 5 units of 2-input NAND gate and write the corresponding Boolean expression.

Design a combinational logic that compares X and Y, where X ¼ X1X0 andY ¼ Y1Y0; the output of combinational logic is 1, when X < Y; otherwise theoutput is 0.(a) Show truth table.(b) Find output function using K-map.

Given is the following circuit with 4 inputs A, B, C, D and the output Y. (O denotes an inverter.) ABCD & 00 & & & =1 & & =1 & & & ≥1 Y a) Create the truth table for this circuit. b) Use a K-map to simplify this circuit. c) State a Boolean equation that describes Y based on your simplification.