Derive a suitable circuit. 15. A given FSM has an input, w, and an output, z. During four consecutive clock pulses, a sequence of four values of the w signal is applied. Derive a state table for the FSM that produces z = 1 when it detects that either the sequence w: 0010 or w: 1110 has been applied; otherwise, z = 0. After the fourth clock pulse, the machine has to be again in the reset state, ready for the next sequence. Minimize the number of states needed.

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
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Please do question 16
z: 0000100001110
Derive a suitable circuit.
15. A given FSM has an input, w, and an output, z. During four consecutive clock pulses, a sequence of
four values of the w signal is applied. Derive a state table for the FSM that produces z = 1 when it detects
After the fourth clock
that either the sequence w: 0010 or w: 1110 has been applied; otherwise, z =
pulse, the machine has to be again in the reset state, ready for the next sequence. Minimize the number of
states needed.
16. Design a counter that counts pulses on line w and displays the count in the sequence 0, 2, 1, 3, 0, 2,....
Use D flip-flops in your circuit.
Transcribed Image Text:z: 0000100001110 Derive a suitable circuit. 15. A given FSM has an input, w, and an output, z. During four consecutive clock pulses, a sequence of four values of the w signal is applied. Derive a state table for the FSM that produces z = 1 when it detects After the fourth clock that either the sequence w: 0010 or w: 1110 has been applied; otherwise, z = pulse, the machine has to be again in the reset state, ready for the next sequence. Minimize the number of states needed. 16. Design a counter that counts pulses on line w and displays the count in the sequence 0, 2, 1, 3, 0, 2,.... Use D flip-flops in your circuit.
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