Create a circuit to generate odd parity bit for a 3-bit code. a.  Construct the truth table. b.  Use K-map to simplify the circuit. c.  Draw the circuit with minimum number of gates. (I did the question myself, but I'm confused as to why the K-map does not provide the simplified circuit to build the minimum number of gates)

show how to design a 8-bit Function Unit Combining Arithmetic Logic Unit (ALU) and a Shifter that can perform the operations given in table 1 below. Use X and Y as 8 bits input and F as 8 bits output as shown in Figure 1. S0,S1,S2 and S3 represent the selction code in the operation set table Three statue bits V (over flow), C (carry), N (negative) and are related to arrithmatic operations and statue bit Z (zero) is relataed to both arrithmatic and logic operation. Test your designed Function Unit with necessary tables.

Please try typing format please

JOIN 3 circuits below(1,2 and 3) in a carry-ripple adder configuration and demonstrate binary addition of two three-bit numbers using a minimum of four number pairs that include both negative and positive numbers (signed 2s complement representation) and at least one overflow result. Circuit 1: a full-adder using any combination of gates from the following ICs: 7400, 7404,7408, 7410, 7420, 7432, and 7486 Circuit 2: a full-adder using a single 74138 IC and any additional assorted gates that may be necessary Circuit 3: a full-adder using a single 74138 IC and assorted gates.