Consider an operating system using memory mapping on a page basis and using a single level page table. Assume that the necessary page table is always in memory. The system takes 200 ns to make a memory reference, how long does a paged memory reference take? Group of answer choices 400 ns (nanoseconds) 809.2 ms (microseconds) 200 ns (nanoseconds) 1638.4 ms (microseconds)
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Consider an
The system takes 200 ns to make a memory reference, how long does a paged memory reference take?
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- Consider a memory implemented for 8086 microprocessor Draw the memory block diagram. Determine the values for A0 , /BHE ,address lines(A1..A19) and data lines(D0.. D15) in order to access: A byte at odd address [01FF3H] A byte at even address [01FFCH] A word at even address [01FFEH] A word at odd address [01ABFH]Suppose that each of the 4 processors in a shared memory multi-processor system is rated at 400 MIPS. A program contains a purely sequential part that accounts for 22% of the program’s execution time on a single processor. The remaining code can be partitioned into three independent parts (A, B, and C). Running on a single processor, part A accounts for 30% of the program’s execution time, part B accounts for 18%, and part C accounts for 30%. What is the apparent MIPS rating for the program if it is run on the 4-processor system and the sequential part must be completed before any of the remaining independent parts (A, B or C) can run in parallel?Consider a memory system that generates 16-bits addresses and the frame size is 32-byte. At time To the status of the page table is given below. Page Table Entry Page # 1911 11 561 56 644 1068 1884 52 58 42 194 46 a) What is the maximum number of entries within a single page/frame? b) What is the maximum number of page table entries in the memory system? c) Using the given page table, determine the physical addresses for the following logical addresses. Write down the physical addresses in binary and decimal format. (i) (iii) 0101000010001011 1110101110010111 (ii) (iv) 0001100001100111 1110111011101001
- A system with simple paged memory management has addresses of B bits and pages of size P KiB. If all memory is pageable, what is the maximum number of items contained in a process's page table? What if K KiB are reserved for the kernel and are not pageable? Also suppose that the page table is organized in 2 levels, so that the page directory (first level) is addressed by D bits. How many bits will be used to address the second level? How many entries will there be, at most, among all the tables of the pages (first and second level) of a process?Consider a system with word-addressable memory in which a word is of 1 byte, 32-bit logical addresses memory, 2 kilobyte page size and page table entries of 4 bytes each. What is the size of the page table in the system in Mega word?In a main memory-disk virtual storage system, the page size is 1KByte and the OPTIMAL algorithm is used for page replacements. A given program has been allocated three page frames in the main memory and it makes the following 16 memory references when it starts executing (the addresses are given in decimal):500, 2000, 2500, 800, 4000, 1000, 5500, 1500, 2800, 400, 5000, 700, 2100, 3500, 900, 2400 Fill in the contents of the three page frames after each memory reference in a table and calculate the hit ratio. Hint: denote by 'a' the page consisting of locations 0 through 1023 in memory. Similarly, b: 1024-2047, c: 2048-3071, d: 3072-4095, e: 4096-5119 and f: 5120-6143. Round to three decimal places.
- In a main memory-disk virtual storage system, the page size is 1KByte and the FIFO algorithm is used for page replacements. A given program has been allocated three page frames in the main memory and it makes the following 16 memory references when it starts executing (the addresses are given in decimal):500, 2000, 2500, 800, 4000, 1000, 5500, 1500, 2800, 400, 5000, 700, 2100, 3500, 900, 2400 Fill in the contents of the three page frames after each memory reference in a table and calculate the hit ratio. Hint: denote by 'a' the page consisting of locations 0 through 1023 in memory. Similarly, b: 1024-2047, c: 2048-3071, d: 3072-4095, e: 4096-5119 and f: 5120-6143. Round to three decimal places.Consider a computer system that has the following characteristics: The memory bus runs at 400 MHz. The memory bus is 8 bytes wide. Accessing a memory address in memory requires 8 memory bus cycles. The disk drives can each read a block every 4 milliseconds. Disk blocks read are 8 kilobytes each. Assume Direct Memory Access from the disk drive. What is the highest percentage of the memory bus capacity that could be consumed by the disk’s Direct Memory Access if there are 4 disk drives in use?For a microprocessor to operate, let assume that it requires 2MB of RAM and 7MB of ROM. What is the minimum number of address lines the microprocessor must support? Draw a memory map of the system, assuming that the addresses for the RAM are below the addresses for the ROM.
- As a simple model of a bus-based multiprocessor system without caching, suppose that one instruction in every four references memory, and that a memory reference occupies the bus for an entire instruction time. If the bus is busy, the requesting CPU is put into a FIFO queue. How much faster will a 64-CPU system run than a 1-CPU system?Consider an operating system that uses Segmentation. Given an address [S,D], where S is the segment and D is the offset. Explain how the CPU will go about resolving an address to retrieve an instruction or data in memory.Suppose we have a byte-addressable computer using fully associative mapping with 16-bit main memory addresses and 32 blocks of cache. Supposed also that each block contains 16 bytes. The size of the offset field is 19 bits and the size of the block field is 0.625 bytes.