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- Implement the following function F(x,y,z) using a decoder. This function will return 1 if the value is divisible by Four otherwise it will return zero. asap pls.A Sequence Detector is a circuit which given an input string of bits generates an output 1 whenever the target sequence (pattern) has been detected. There are two types of sequence detectors: Overlapping: The detector allows overlapping, hence the final bits of one sequence can be the start of another sequence. Non-overlapping: The detector does not allow overlapping, hence a new sequence starts only after the previous sequence is completed. Ex: Detect pattern 101 For non-overlapping case: Input :0110101011001 Output:0000100010000 For overlapping case: Input :0110101011001 Output:0000101010000 Design a sequential circuit (overlapping) with an input ‘x’. The pattern to be detected is the binary number that is equal to 1001100 For example,the circuit detects the sequence 00010 . When the sequence is detected, the detector outputs z=‘1’ For this circuit: Draw the ASM diagram. Construct the state table. Draw the logic circuit for the datapath and control in logisim.A Sequence Detector is a circuit which given an input string of bits generates an output 1 whenever the target sequence (pattern) has been detected. There are two types of sequence detectors: Overlapping: The detector allows overlapping, hence the final bits of one sequence can be the start of another sequence. Non-overlapping: The detector does not allow overlapping, hence a new sequence starts only after the previous sequence is completed. Ex: Detect pattern 101 For non-overlapping case: Input :0110101011001 Output:0000100010000 For overlapping case: Input :0110101011001 Output:0000101010000 Design a sequential circuit (overlapping) with an input 'x' the pattern to be detected is 01010 For this circuit: 1. Draw the ASM diagram. 2. Construct the state table. 3. Draw the logic circuit for the datapath and control in logisim.
- Implement code convertor Y=(X+4) mod 8 using decoder and encoder. Y and X are 3-bit numbers.A bit string contains 1's and 0's. How many different bit strings can be constructed given the restriction(s)? Length is 20. Has exactly six 1's in the first half. Has exactly three 1's in the second half.The function that implements karnaugh map shown below is ABICD 00 01 11 10 00 1 01 X 1 11 1 10 1 1 Select one: O a. (C + D)(C' + D)(A + B) b. A'B + CD c. AD + A'B d. D(C + A)
- Implement a shift and add multiplier in Verilog to multiply two 4 bit numbers. It should becapable of multiplying both positive and negative numbers. Negative numbers arerepresented in 2’sC representation.implement bitMask(x,y) Generate a mask consisting of all 1’s from lowbit to highbit /* * bitMask - Generate a mask consisting of all 1's * lowbit and highbit* Examples: bitMask(5,3) = 0x38* Assume 0 <= lowbit <= 31, and 0 <= highbit <= 31* If lowbit > highbit, then mask should be all 0's* Legal ops: ! ~ & ^ | + << >>* Max ops: 16* Rating: 3*/int bitMask(int highbit, int lowbit) {return 2;}In a two's complement number system, x &= (x-1) deletes the rightmost 1-bitin x. Explain why. Use this observation to write a faster version of bitcount.
- Prove that in a bit string, the string 10 occurs at most one more time than the string 01.Implement the following Boolean function F(A, B, C, D)= m(1,4, 6, 7, 8,9, 12, 13,15) with: An 8x1 MUX. Assume that the inputs A, B, and C are used for the select lines.State. O explain Encoding and Decodig with for. AS CH85. 23.1