Common Gate „Coz W 2 T * = 4 mA and Vth = 600 mV. For this problem, use Ip = k(VGs – VrH). Assume that the NMOS transistor is in the saturation region. Round the answers to the nearest whole number. Analyze the circuit using k VOUT -3.3 Vo 2.2 k2 Rp Common Gate Amplifier 1. What is the value of Ip? Ip = mA 2. What should the value of Rp be if Vps = Vp,SAT? Rp =

A. For the configuration shown below in 4(A), find the small signal voltage gain (Voutp-Voutm)/Vin B. For the configuration shown in 4(B), find the following parameters (a) DC value of output voltage, (b) input common mode range and (c) small signal voltage gain when all transistors are in saturation vou/Vin as indicated in the diagram; Assume no body bias on M1 ad M2 For this problem ONLY, assume the following device parameters V7, = \V| = 0.5V;K, = k ,' = 100 µA / V²,a, = a, = 0.01 VDD = 3V (10/1) M, M. (10/1) (10/1) M, |M, (10/1) Voutp 20kΩ м, (200/1) м, м, (10/1) м, Vin (1/1) м, M. (10/1) + Vin DC VAN M, 100HA (1/1) M, M, (10/1) (A) (B) V. =-1V

For the p-channel JFET circuit in the Figure, the transistor parameters are: /oss = 2 mA, Vp = |1.75| V. (a) Determine Ipo and Vspo- (b) Give the small signal model (c) Determine the small-signal voltage gains Av = vo/vi QUESTION I: For the p-channel JFET circuit in the Figure, the transistor parameters are: Ioss = 2 mA, Vp = |1.75| V. (a) Determine Ipo and Vspo- (b) Give the small signal model (c) Determine the small-signal voltage gains Av = vo/vi VDD = 10 V Rg = 5 k£2 R1 = 90 kQ %3D Cc2 RL = 10 k2 R2 = 110 k2 ww