b. Find the operating point (ID, VDs) for the MOSFET. Again, first assume a region of operation, then determine the operating point, then check to make sure the assumption was correct. Now assume that K₂ decreases by 20% to 20μA/V², what is the effect on the operating point (IDS, VDS)? C.

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5. The problem with the simple biasing circuit in problem 4 is that it's very sensitive to variations in
the transistor parameters. The bias circuit shown below is an improved design with less sensitivity
to variations in transistor parameters. Assume Kn = 25μA/V², VTN =1V.
R2 31.5ΜΩ
VEQ
C.
G
Ro 375 ΚΩ
REQ
R, 31ΜΩ R, 3 39 ΚΩ
M1
a. Re-draw the gate biasing circuit with its Thevenin equivalent just like in problem 4(a), what are
VEQ and REQ?
G
Ro 375 ΚΩ
S
R₂
M1
+
39 ΚΩ
VDD = 10V
+
VDD
= 10V
b. Find the operating point (ID, Vòs) for the MOSFET. Again, first assume a region of operation,
then determine the operating point, then check to make sure the assumption was correct.
Now assume that K₁ decreases by 20% to 20µA/V², what is the effect on the operating point
(IDS, VDS)?
Transcribed Image Text:5. The problem with the simple biasing circuit in problem 4 is that it's very sensitive to variations in the transistor parameters. The bias circuit shown below is an improved design with less sensitivity to variations in transistor parameters. Assume Kn = 25μA/V², VTN =1V. R2 31.5ΜΩ VEQ C. G Ro 375 ΚΩ REQ R, 31ΜΩ R, 3 39 ΚΩ M1 a. Re-draw the gate biasing circuit with its Thevenin equivalent just like in problem 4(a), what are VEQ and REQ? G Ro 375 ΚΩ S R₂ M1 + 39 ΚΩ VDD = 10V + VDD = 10V b. Find the operating point (ID, Vòs) for the MOSFET. Again, first assume a region of operation, then determine the operating point, then check to make sure the assumption was correct. Now assume that K₁ decreases by 20% to 20µA/V², what is the effect on the operating point (IDS, VDS)?
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