(b) Figure Q2(b) shows a logic circuit that is constructed by using two multiplexers, MUX1 and MUX2. Analyze the circuit to determine the Boolean expression of w and f. (You may need to simplify the Boolean expression) MUX2 MUX1 I0 1 I0 Il Z 12 Il Z 12 В 13 13 so si SO si C D А В
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- For a ((A+B)' + (A'B')) Boolean equation, with the input waveforms as shown in Figure 2, which output waveform is correct? INPUT A INPUT B OUTPUT a OUTPUT b OUTPUT C OUTPUT d- Figure 2 Output b Output a Output d Output c A full adder logic circuit has Three inputs and three outputs. Three inputs and two outputs. Two inputs and one output. Two inputs and two outputs.USE DIGITAL LOGIC AND DESIGN Part 1: In Figure_4; we have 4-bit Comparator using 2-bit Comparators block. You have to satisfy given condition by applying all data on figure 4. At the end, given condition should produce HIGH output and other two should be LOW. A3 A2 A1 A0 = 1101 and B3 B2 B1 B0 = 1110 Figure_4 Part 2: The serial data-input waveform (Data in) and data-select inputs (S0 and S1) are shown in Figure_5. Determine the data-output waveforms from D0 through D3. Figure_5 Part 3: Decoder can be useful when we have to decode some specific numbers from their equivalent code. Figure 6 has a concept of 3 to 8 line decoder from which you have to generate output waveform from D0 to D7 with proper relationship to input. Figure_6 Part 4: The data-input and…Logic circuit Design combinational logic circuit that takes 7 bit numbers and an input and output will be the reverse of this bits from right to left to the first one including one and remaining of the bits will be the same example input 0011000 output 0010111 Can you draw it’s logic circuit in detail not theory answer and if we can solve this question multiplexer
- (c) Figure Q3(c)(i) shows a register and Figure Q3(c)(ii) shows the input waveforms (CLOCK and Data in) to the circuit. A1 A9 A10 A2 Function generator A3 A11 A12 AS A13 A6 A14 A7 A15 Data in Bop.7) ip.r 82p.7) Logic analyser U1 U2 U3 U4 UO 6. 1. 6 1 6 INVERTER 3 CLK 3 CLK oCLK CLK 5 K K 5 K K 4027 Clock Function generator Figure Q3(c)(i) (i) Determine the type of register as shown in Figure Q3(c)(i).mybmsajmanac ERSITY Design My courses Logic Design General Qua 2 LD/DLD on Tue. 7/12/21-Dr. Zidan The correct state sequence of the cirtut with initial state Qo1, 01 and Q0 D. Q D, a. LSB MSB Clock Select one O a1, 2, 5.3, 7,6,4 O b.1,6, 5,7, 2.3,4 O C1,2.7,3, 5,6, 4 O d 1,3,4, 6, 7,3.2Write a VHDL code for the following simple logic circuit. D- X1 X2 f X3
- Basic Combinational Logic Circuits 2. Write the output expression for logic circuit: A B B XA three input logic functipn will provide a logic high output only when twp (and two only) of the inputs are logic highs. For all other input possibilities, a logic zero is provided on the output. What is the logic expression? A. Y=A'B'C+A'BC'+AB'C' B. Y=AB'C+A'BC+ABC' C. Y=AB'C+ABC+A'B'C' D. Y=ABC'+AB'C+A'B'C'answere fast please question from DIGITAL LOGIC DESIGN TOPIC : Designing Combinational Logic You are designing a water level circuit using 74ALS151 (8 to 1 Multiplexer IC)* When input is 0000 that means tank is empty.* When input is 1111 that means tank is full.* When input is below 5, that means water level is low.* So, make a circuit using 74ALS151 Multiplexer IC that shows a "low water" indicator light(by setting an output L to 1) when the water level drops below level 5.
- Design the following combinational logic circuit with a four-bit input and a three-bit output. The input represents two unsigned 2-bit numbers: A1 A0 and B1 B0. The output C2 C1.C0 is the result of the integer binary division A1 A0/B1 B0 rounded down to three bits. The 3-bit output has a 2-bit unsigned whole part C2 C1 and a fraction part CO. The weight of the fraction bit CO is 21. Note the quotient should be rounded down, i.e. the division 01/11 should give the outputs 00.0 (1/3 rounded down to 0) not 00.1 (1/3 rounded up to 0.5). A result of infinity should be represented as 11.1. A minimal logic implementation is not required. (Hint: start by producing a truth table of your design).ii) For the circuit shown in Figure B9, a. Find logic functions for Y and Z. b. Simplify function Z using Boolean algebra. Y Figure B9 ABQuestion1: Read the following table, and design a logic circuit that can convert the binary code from 2421 to Excess-3. Four Different Binary Codes for the Decimal Digits Decimal ВCD 8421 Digit 2421 Excess-3 8, 4, –2, –1 0000 0000 0011 0000 1 0001 0001 0100 0111 0010 0010 0101 0110 3 0011 0011 0110 0101 4 0100 0100 0111 0100 5 0101 1011 1000 1011 0110 1100 1001 1010 7 0111 1101 1010 1001 8 1000 1110 1011 1000 1001 1111 1100 1111 1010 0101 0000 0001 Unused 1011 0110 0001 0010 bit 1100 0111 0010 0011 combi- 1101 1000 1101 1100 nations 1110 1001 1110 1101 1111 1010 1111 1110