ADD [R1], R2, [R3]; Here [R1] and [R3] indicate memory locations pointed by R1 and R3 register respectively. Here the operand field next to opcode will hold the result at the end. Assume that the machine code of this instruction is loaded at address 1020H of the main memory. Also assume that the contents of registers R1, R2 and R3 are 2001H, 2002H and 2003H respectively. Moreover, 1000H, 2000H and 3000H are saved at memory addresses 2001H, 2002H and 2003H respectively. a) Draw a schematic diagram of a CPU, show its important functional units required to process this instruction.

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ADD [R1], R2, [R3]; Here [R1] and [R3] indicate memory locations pointed by R1 and R3
register respectively. Here the operand field next to opcode will hold the result at the end.
Assume that the machine code of this instruction is loaded at address 1020H of the main
memory. Also assume that the contents of registers R1, R2 and R3 are 2001H, 2002H and
2003H respectively. Moreover, 1000H, 2000H and 3000H are saved at memory addresses
2001H, 2002H and 2003H respectively.
a) Draw a schematic diagram of a CPU, show its important functional units required to
process this instruction.
Transcribed Image Text:ADD [R1], R2, [R3]; Here [R1] and [R3] indicate memory locations pointed by R1 and R3 register respectively. Here the operand field next to opcode will hold the result at the end. Assume that the machine code of this instruction is loaded at address 1020H of the main memory. Also assume that the contents of registers R1, R2 and R3 are 2001H, 2002H and 2003H respectively. Moreover, 1000H, 2000H and 3000H are saved at memory addresses 2001H, 2002H and 2003H respectively. a) Draw a schematic diagram of a CPU, show its important functional units required to process this instruction.
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