A differential amplifier will be designed using the given topology in the figure. VoD VDp = 6 V Vss=- 6 V NMOS: VIN= 1 V H„Cax(W/L) =1 mA/V² M2 M3 M. Ov2 PMOS: VTp = - 1 V H„Cax(W/L) =0.5 mA/V² Vo. RD RoS Vss The specifications are as follows: 1) Your design parameters are Ij, I2 and Rp. You can select them as you wish. 2) The differential-mode gain (Adm=VWid when v,=+vd /2, v2=- Vid / 2) should be Adm=10 V/V. 3) All transistors should operate in SAT. Best design criteria is to have as low power dissipation (P) as possible. Fill up the table with your design parameters. Output Parameters Input Design Parameters Iz |(mA) (mA) | (k£2) VSG3 (V) Vsp3 (V) VRD (V) | (V/V) | (VN) | (mW) Rp VGsi (V) Vpsi (V) e Adm Açm 2 3 4

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A differential amplifier will be designed using the given topology in the figure.
VDD
VDD = 6 V
Vss =- 6 V
M2
NMOS:
VIN = 1 V
M3
M4
V2 H„Cax(W/L) =1 mA/V²
PMOS:
VTp = - 1 V
Vo
H„Cex(W/L) =0.5 mA/V²
RD RD
Vss
The specifications are as follows:
1) Your design parameters are I1, Iz and Rp. You can select them as you wish.
2) The differential-mode gain (Adm=V/vid when v,=+vid /2, vz=- vid / 2) should be Adm=10 V/V.
3) All transistors should operate in SAT.
Best design criteria is to have as low power dissipation (P) as possible.
Fill up the table with your design parameters.
Input Design
Parameters
I2
(mA) (mA) (k2)
I
Output Parameters
t
Vpsi
VSG3
VSD3
(V)
I,
Rp
VRD
VGSI
(V)
e
Adm
Acm
P
(V)
(V) (V/V) (V/V) | (mW)
1
2
3
4
Transcribed Image Text:A differential amplifier will be designed using the given topology in the figure. VDD VDD = 6 V Vss =- 6 V M2 NMOS: VIN = 1 V M3 M4 V2 H„Cax(W/L) =1 mA/V² PMOS: VTp = - 1 V Vo H„Cex(W/L) =0.5 mA/V² RD RD Vss The specifications are as follows: 1) Your design parameters are I1, Iz and Rp. You can select them as you wish. 2) The differential-mode gain (Adm=V/vid when v,=+vid /2, vz=- vid / 2) should be Adm=10 V/V. 3) All transistors should operate in SAT. Best design criteria is to have as low power dissipation (P) as possible. Fill up the table with your design parameters. Input Design Parameters I2 (mA) (mA) (k2) I Output Parameters t Vpsi VSG3 VSD3 (V) I, Rp VRD VGSI (V) e Adm Acm P (V) (V) (V/V) (V/V) | (mW) 1 2 3 4
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