A 2-input static CMOS NAND gate is implemented to realize the function of Y = A- B. The lumped capacitance at the output of the NAND gate is CNAND = 12fF. (a) Draw the circuit diagram of 2-input statis CMOS NAND gate. Clearly label the inputs, output, VDD and GND. What is the value of VpD, threshold voltage of NMOS transistor Vn and threshold voltage of

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A 2-input static CMOS NAND gate is implemented to realize the function of Y = A- B. The lumped
capacitance at the output of the NAND gate is CNAND = 12fF.
(a) Draw the circuit diagram of 2-input statis CMOS NAND gate. Clearly label the inputs, output, VDD and
GND. What is the value of VpD, threshold voltage of NMOS transistor Vn and threshold voltage of
Transcribed Image Text:A 2-input static CMOS NAND gate is implemented to realize the function of Y = A- B. The lumped capacitance at the output of the NAND gate is CNAND = 12fF. (a) Draw the circuit diagram of 2-input statis CMOS NAND gate. Clearly label the inputs, output, VDD and GND. What is the value of VpD, threshold voltage of NMOS transistor Vn and threshold voltage of
VDo
input
0.2V 0.ŠV 0.8V VDD
(a) Reference inverter VTC
В
A D
Di
D-
Az
Az
Transcribed Image Text:VDo input 0.2V 0.ŠV 0.8V VDD (a) Reference inverter VTC В A D Di D- Az Az
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