5. A PLL HAS VCO WITH FREE RUNNING FREQUENCY OF 20 MHZ. AS THE FREQUENCY OF THE REFERENCE INPUT IS GRADUALLY RAISED THE LOOP LOCKS AT 17.5 MHZ AND COMES OUT OF LOCK AGAIN AT 25 MHz. DETERMINE. A. CAPTURE RANGE B.) LOCK RANGE -1.51

Introductory Circuit Analysis (13th Edition)
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ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
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5.
5. A PLL HAS VCO WITH FREE RUNNING FREQUENCY OF 20 MHz. AS
THE FREQUENCY OF THE REFERENCE INPUT IS GRADUALLY RAISED
THE LOOP LOCKS AT 17.5 MHZ AND COMES OUT OF LOCK AGAIN
AT 25 MHZ. DETERMINE,
A. CAPTURE RANGE
B.) LOCK RANGE
7=7%
Igeark
GEME
DATE.
FOR THE MADIN
BY THE
-1.71
Transcribed Image Text:5. A PLL HAS VCO WITH FREE RUNNING FREQUENCY OF 20 MHz. AS THE FREQUENCY OF THE REFERENCE INPUT IS GRADUALLY RAISED THE LOOP LOCKS AT 17.5 MHZ AND COMES OUT OF LOCK AGAIN AT 25 MHZ. DETERMINE, A. CAPTURE RANGE B.) LOCK RANGE 7=7% Igeark GEME DATE. FOR THE MADIN BY THE -1.71
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