4. (a) Design a 3-flip-flop counter which counts in the following sequence: АВС 000 010 111 100 110 011 001 000 Flp-foр A is a T flip-Пор. Flip-flop B is an S-R flip-flop. Flip-flop C is a J-K flip-flop. Use AND and OR gates and try to minimize the total number of gate inputs. (b) If your counter is started in state 101 and a series of input pulses is applied, what will happen?

Electric Motor Control
10th Edition
ISBN:9781133702818
Author:Herman
Publisher:Herman
Chapter22: Sequence Control
Section: Chapter Questions
Problem 6SQ: Draw a symbol for a solid-state logic element AND.
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4. (a)
Design a 3-flip-flop counter which counts in the following sequence:
АВС
000
010
111
100
110
011
001
000
Flp-foр A is a T flip-Пор.
Flip-flop B is an S-R flip-flop.
Flip-flop C is a J-K flip-flop.
Use AND and OR gates and try to minimize the total number of gate inputs.
(b) If your counter is started in state 101 and a series of input pulses is applied,
what will happen?
Transcribed Image Text:4. (a) Design a 3-flip-flop counter which counts in the following sequence: АВС 000 010 111 100 110 011 001 000 Flp-foр A is a T flip-Пор. Flip-flop B is an S-R flip-flop. Flip-flop C is a J-K flip-flop. Use AND and OR gates and try to minimize the total number of gate inputs. (b) If your counter is started in state 101 and a series of input pulses is applied, what will happen?
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