+3.3 V M13 м, + Ms Figure P6.57

Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
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Question

 What are the noise margins for the circuit ?

+3.3 V
M13
м, +
Ms
Figure P6.57
Transcribed Image Text:+3.3 V M13 м, + Ms Figure P6.57
Expert Solution
Step 1

As we know

VTN=0.6 VVDD=2.5 VKn'=100 μA/V2WLs=41WLL=21

The maximum input voltage accept as low input logic level is given by

VIL=VTNS=0.6 V

The output voltage across an input voltage VIL is

VOH=VDD-VTNL=2.5-0.6=1.9 V

Step 2

The output voltage across an input voltage VIH is

VOL=VDD-VTNL1+3KR

KR=WLsWLL=4121=8

Hence,

VOL=2.5-0.61+3×8=1.95=0.38 V

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