3. Provide a cross-section process flow to result the gold micropillar-array electrode as shown in the figure below starting from a <100> bare silicon substrate (the cross section flow should include fabrication of two micropillars). If you are using photolithography, please provide cross-section of your optical masks with clear indication of transparent and opaque region based on the type of your photoresist. Silicon dioxide and the bottom gold layers are 1 μm and 200nm thick, respectively. The diameter and height of each pillar is 5 μm and 10 um, respectively. The spacing between the pillars is 20 μm. You are only allowed use one of the given processes below for your process flow. PECVD Sputtering Electroplating Thermal oxidation Photolithography (photoresist thickness available from 1.5 um to 13um) DRIE RIE Gold Silicon Dioxide Silicon
3. Provide a cross-section process flow to result the gold micropillar-array electrode as shown in the figure below starting from a <100> bare silicon substrate (the cross section flow should include fabrication of two micropillars). If you are using photolithography, please provide cross-section of your optical masks with clear indication of transparent and opaque region based on the type of your photoresist. Silicon dioxide and the bottom gold layers are 1 μm and 200nm thick, respectively. The diameter and height of each pillar is 5 μm and 10 um, respectively. The spacing between the pillars is 20 μm. You are only allowed use one of the given processes below for your process flow. PECVD Sputtering Electroplating Thermal oxidation Photolithography (photoresist thickness available from 1.5 um to 13um) DRIE RIE Gold Silicon Dioxide Silicon
Chapter59: Motor Startup And Troubleshooting Basics
Section: Chapter Questions
Problem 12SQ: How is a solid-state diode tested? Explain.
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