11) Complete the shifting circuit below to shift a 3-bit value 1 bit to the left if the "Left" input is 1 (right otherwise). The circuit should sign extend if the "Signed" input is 1 (shift in zeros otherwise). Note: this is not a merged shifter-rotator. D₂ D₁ Do Left Signed Xo X₁

Using the attached full adder as a component, write a VHDL code for a an adder that adds two 2-bit inputs A and B and output the result to the 3-bit output C

f. g, h: OUT STD_LOGIC a OR AND f. g. h: IN STD LOGIC a, b, c: OUT STD_LOGIC C NOT(b) To implement a 32-1 Mux using 4-1 Muxes and 2-1 Muxes, we need: Select one: a. Eight 2-1 Muxes in the right stage, two 4-1 Muxes in the middle stage and one 2-1 Mux in the left stage Ob. Eight 4-1 Muxes in the right stage, two 4-1 Muxes in the middle stage and one 2-1 Mux in the left stage C. Eight 4-1 Muxes in the right stage, four 2-1 Muxes in the middle stage and one 4-1 Mux in the left stage O d. Eight 4-1 Muxes in the left stage, two 4-1 Muxes in the middle stage and one 2-1 Mux in the right stage Select the correct answer that corresponds to the decimal value of the following number in fixed-point representation 1100.1001 Select one: O a. 12.125 b. 12.75 C. 12.5625 d. 8.5625 EN

C₂ S = 0 A B₂ b. B = 0000 C. ( FA S₁₂ = 1111 S=0 A = 1001 B = 0111 d. S=1 A = 0000 B 1100 e... S=1 A = 0011 B = 1010 Az Input values for the adder-subtractor circuit above are given below. In each case, indicate the values of the outputs C4, S3, S₂, S₁, and So- a. ( S = 1 A = 0000 B = 1111 9₂ C4 S3 = S₂ = S₁ = So = C4= S₂ = S₂ = S₁ = So= C4= S3 S₂ = S₁ = So= B₂ C4 = S3 = S₂ = S₁ = So= C₁ = S3 = S₂ = S₁ = So = A₂ FA B₁ A₁ D FA St Ao FA So