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Implementation Of The Sdn Switch Core, Interconnection Of Multiple Sdn

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This section contains information about the implementation of the SDN switch core, interconnection of multiple SDN switches with the SDN controller (PowerPC) and the attacker nodes (Microblaze). The main functionality of the SDN switch is to modify packet header fields based on the flow table and forward it to the next port(s). The SDN controller is responsible for programming the flow table in each switch and monitor these switches to observe each packet flow. The Microblaze processor, acting as attacker nodes plays the role of an outside network and transmits packets at different programmable rates to the SDN switch network using an array of packet drivers. The big picture showing the connection between different components is given in Figure 3.1. The chapter is divided into two main sections. Section 3.1 describes the details of hardware implementation and section 3.4 describes the software implementation. 3.1 SDN Switch The Figure 3.2 shows the implementation of a 4 × 4 programmable switch implemented with store and forward architecture. It contains multiple internal registers for software access to provide insight about the traffic flowing through the switch. This switch is a simplified version of NetFPGA’s 1G Switch [21]. The logic is customized so that multiple switches can fit in to one FPGA. This switch provides 10-tuple matching to identify a flow and can support 32 flows at a time. The flow lookup table is implemented in a hash table which is programmed by

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