two inputs S and X, S is a sign bit, X is BCD 8 bits number • Check the sign bit. If it is 0, directly output the binary representation of the BCD number.
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- a) Design a single-digit decade counter that counts from 0 to 9 and repeats. The single-digit decade counter should be built by a cascaded synchronous binary counter (74LS163) and other basic logic gates. Simulate thecomplete counter circuit by OrCAD and PSPICE. Capture the circuit schematic and the simulated waveform.(Define the simulation timings for at least one full counting cycle from 0 to 9 and back to 0.)(Hint: Use the DigClock input from the SOURCE as shown below and setup the CLK ONTIME and OFFTIME accordingly for the clock source.)parity generator design, construct and test a circuit that generates an even parity bit ffrom four messages bits . use XOR gates. adding one more XOR gate, expand the circuit so that it generates an odd parity bit also.VII) Convert from (i) (ii) Find the binary equivalent of the BCD number (0100 1001 1001.0100 0011 0011)BCD Find the BCD equivalent of the binary number 110100010.101102
- Design counter that counts from 00 to 59, using the IC 74LS90 ripple counter and use two 7 segment display to display the result count. You can also use 7447 binary to 7-segment Display Decoder shown below.Q3/ Design binary adder that add three BCD numbers (1-digit) using CPAS. Q4/ Design a counter which count in the following sequence 0, 2, 4, 6, 8, 10, 12, 14 using T- F.F.Design counter that counts from 00 to 59, using the IC 74LS90 ripple counter and use two 7 segment display to display the result count. You can also use 7447 binary to 7-segment Display Decoder. i need the diagram of it
- Match the following binary code (A) into BCD representation (B): 0100 0001 0111 0110 A. 0111 B. 0110 C. 0100 D. 0001Design a MOD-5, 3-bit synchronous counter to count in the following sequence: 2, 3, 5, 1, 7. The counter must be self-starting with the count states of 0, 4, and 6 leading directly to 2.Compute the sum of two signed binary numbers below and convert the sum to decimal format. 101010 & 100110 Also, convert the two binary numbers above to decimal format, compute the sum, and compare with the result above.
- Q1: Design and implement an asynchronous counter that counts from 0000 up to 1100 (modulus 13). Use OR gate, and show in the drawing how the OR gate is connected to truncate the state 1101.VII) Convert from (i) (ii) Find the binary equivalent of the BCD number(0010000000010100.0101011000100101)BCD Find the BCD equivalent of the binary number 11101001011.100125 clock signal frequency for a 4-bit up counter is 20kHz. What is the frequency of the most valuable bit output? d) none