Please enter all answers in decimal. Consider the two 6-bit numbers x1 = 101101 and x2 = 111100. What is S1(x1)? (in decimal) What is S1(x2)? (in decimal)
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- Design a code converter that converts a decimal digit from BCD to excess-3 code, the input variables are organized as (A BC D) respectively with A is the MSB, the output variables are organized as (W XY Z) respectively with W is the MSB, put the invalid decimal numbers as don't care. X= BCD'+B'D+B'C X= BC'D'+B'D+BC X= BC'D'+B'D+B'C X= BC'D'+BD+B'CUSE DIGITAL LOGIC AND DESIGN Part 1: In Figure_4; we have 4-bit Comparator using 2-bit Comparators block. You have to satisfy given condition by applying all data on figure 4. At the end, given condition should produce HIGH output and other two should be LOW. A3 A2 A1 A0 = 1101 and B3 B2 B1 B0 = 1110 Figure_4 Part 2: The serial data-input waveform (Data in) and data-select inputs (S0 and S1) are shown in Figure_5. Determine the data-output waveforms from D0 through D3. Figure_5 Part 3: Decoder can be useful when we have to decode some specific numbers from their equivalent code. Figure 6 has a concept of 3 to 8 line decoder from which you have to generate output waveform from D0 to D7 with proper relationship to input. Figure_6 Part 4: The data-input and…Q1. Convert following numbers in given radix system: a. (697)10 into Octal and Hexa decimal b. (2D9)16 into Decimal and Octal Q2. Using two's complement representation, solve: a. 101110001 – 1111111001 b. 1010101010 – 1010010101 Q3. Perform following arithmetic operations: a. (6767)10 + (3592)10 using BCD b. (C7C)16 - (B0E)16 using 16's complement Q4. A code 1011011 needs to be sent to the receiver. Using, hamming code find out the code- word and the mechanism to check the corrected data when error occurred at 4th bit. (Assumptions: Right to Left with Odd Parity) Q5. (a) Convert the following logic gate circuit into a Boolean expression, writing Boolean sub-expressions next to each gate output in the diagram: A (b) Realise Ex-OR gate using universal gate? Q6. Implement and simplify f (A, B, C, D) = E(1,3,5,8,9,11,13,15) using K-map?
- Design a code converter that converts a decimal digit from BCD to excess-3 code, the input variables are organized as (A BC D) respectively with A is the MSB, the output variables are organized as (W X Y Z) respectively with W is the MSB, put the invalid decimal numbers as don't care. X= BCD'+B'D+B'C X= BC'D'+B'D+BC X= BC'D'+B'D+B'C X= BC'D'+BD+B'C1. An arithmetic system operates with 3-digit decimal numbers with sign presented in BCD (12 bits), negative numbers utilize the 10's complement form, one decimal digit (4 bits) is occupied by sign: 0 for "+" and 9 for "-". 1a) Show the most positive and the most negative numbers in both decimal and BCD forms. 1b) Present numbers A=+36 and B= -42 in BCD. 1c) Present the 10's complements of A and B in BCD. 1d) Perform the following operations bit-by-bit, show carries, apply BCD correction (add 6) when necessary (the sum of two decimal digits is greater than 9). 1d1) A+B in BCD. 1d2) A - B = A+(-B) in BCD by addition of A and the 10's complement of B. 1d3) B-A= B + (-A) in BCD by addition of B and the 10's complement of A.5. Assume d3d₂d₁do is a BCD number and derive Boolean expression for segments b,c,e,f,g in a seven segment display in terms of d3d₂d₁do g 4 d Based on your boolean expressions derive the values of b,c,e,f,g segments when i. d3d₂d₁do= (0100) 2 ii. d3d₂d₁do = (0111)₂ iii. d3d2d₁do (1000)2
- Computer architecture 1. Perform the following calculations. All numbers are 8-bit Integers; except where noted. Show all work. Note any overflow. Note that 2c signifies 2s complement and sm signifies signed-magnitude. I suggest you check your answers in base 10. 11110110 - 100101112c= 11110110 & 00001111= Convert -1610sm to Base 16 Convert AD16c to Base 10 F9 + E916c=56.) Derive the truth table of a decimal-to-binary priority encoder. There are 10 inputs I, through I, and outputs A, through A, and V. Input I, has the highest priority. 37.) (a) Design an 8-to-1-line multiplexer using a 3-to-8-line decoder and an 8 X 2 AND-OR. 5-52. Perform the indicated subtraction with the following unsigned binary numbers by taking the 2s complement of the subtrahend: (a) 11010 – 10001 - (b) 11110 1110 (c) 1111110 - 1111110 (d) 101001 – 101 Time: 616 minutes at 11:59pm Points 25 Questions 13 WARNIN AY 7:36 WShow each step clearly ... 1. Compute the 8-bit two’s complement for -79 and -23. 2. What are the negative decimal numbers represented by the bytes 0xF2 and 0x83? 3. Show how each of the following signed, decimal integers would be stored in 8-bit two's complement code. Give your answer in hexadecimal. Must show the steps to get the result. (part a) +99 (part b) -1
- give the final result of operation that appears onto OUT-Reg. after convert the whole program below into Op-code? Address OH 1H 3H 4H 5H Mnemonic LDA AH US Address 6H 7H 8H 9H AH BH CH DH EH FH DATA FFH FFH FFH 01H OEH 01H OFH FFH FFH FFHExercise 2: Convert the given binary and hexadecimal numbers into decimal numbers Please solve this i. 0011 0010 ii. 01101101 iii. 01010101 iv. B516 v. F316 vi. 2C16Perform the addition of the following 8-bit 2's complement numbers using 2's complement arithmetic. (Reminder: 2's complement numbers are signed numbers.) a) 11001001 + 00110011 b) 10011011 + 01101111 c) 01011010 + 10110110 d) 11001000 + 11100101 Convert each result from the previous problem to signed decimal. Draw the block diagram of the circuit required to implement the operation in Problem 3.