Design a circuit for a digital lock using the minimum number of D latches. The lock has two input push-button switches A, B and it outputs a single pulse (Z1) for each activation i.e. lock open. The two switches are interlocked mechanically so that simultaneous pulses are not possible. The lock should have the following features: a. The opening sequence is 0011. ii. Then replace ‘0’ by ‘A’ and ‘1’ by ‘B’ in the sequence. b. Five B pulses should give an absolute reset. c. Any incorrect use of the A switch will cause an output (Z2) to ring a bell to warn that the lock is being tampered.

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