B. MIPS uses large register file to store data variables. Name the technique of putting less commonly used variables into memory. C. Consider a machine with a byte addressable main memory. Analysis on classification algorithms have shown the research scientists that the size of the main memory should be 2^11 Bytes and block size 16 Bytes. The newly designed machine employs 32 lines of 4-way set associative cache. Answer the following questions: i. How many lines are there per set ? ii. To which set the address 128 maps to? iii. It is noted that, the "miss" scenario takes 30ns and a "hit" scenario takes only 5ns when the algorithm is run. If 80% of the processor's memory requests result in a cache "hit", how much time does it take to access memory on average?

Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
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B. MIPS uses large register file to store data variables. Name the technique of putting less commonly used variables into memory.
C. Consider a machine with a byte addressable main memory. Analysis on classification algorithms have shown the research scientists that the size of
the main memory should be 2^11 Bytes and block size 16 Bytes. The newly designed machine employs 32 lines of 4-way set associative cache. Answer
the following questions:
i. How many lines are there per set ?
ii. To which set the address 128 maps to?
iii. It is noted that, the "miss" scenario takes 30ns and a "hit" scenario takes only 5ns when the algorithm is run. If 80% of the processor's memory
requests result in a cache "hit", how much time does it take to access memory on average?
Transcribed Image Text:B. MIPS uses large register file to store data variables. Name the technique of putting less commonly used variables into memory. C. Consider a machine with a byte addressable main memory. Analysis on classification algorithms have shown the research scientists that the size of the main memory should be 2^11 Bytes and block size 16 Bytes. The newly designed machine employs 32 lines of 4-way set associative cache. Answer the following questions: i. How many lines are there per set ? ii. To which set the address 128 maps to? iii. It is noted that, the "miss" scenario takes 30ns and a "hit" scenario takes only 5ns when the algorithm is run. If 80% of the processor's memory requests result in a cache "hit", how much time does it take to access memory on average?
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