Read the Assembly program carefully, understand its working/functionality and answer the below given questions. MOV DX, 0090 MOV DS, DX MOV DX, 0019 MOV AX, 0 MOV CX, FFFF UP: ADD CX, 0002 INC AX SUB DX, CX JNZ UP ;JNZ is Jump if ZF=0 in the result of SUB instruction INT 10 INT 7 a. What will be the values of below given registers after execution of the program. DX: CX: b. What will be displayed on the LCD after the execution of the program?

Read the Assembly program carefully, understand its working/functionality and answer the below given questions. MOV DX, 0090 MOV DS, DX MOV DX, 0019 MOV AX, 0 MOV CX, FFFF UP: ADD CX, 0002 INC AX SUB DX, CX JNZ UP ;JNZ is Jump if ZF=0 in the result of SUB instruction INT 10 INT 7 a. What will be the values of below given registers after execution of the program. DX: CX: b. What will be displayed on the LCD after the execution of the program?

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter4: Processor Technology And Architecture

Section: Chapter Questions

Problem 15VE: A(n) ________________ instruction always alters the instruction execution sequence. A(n)...

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Given a memory load instruction, "mov R0; [R1+1000]," please give the input that should be selectedat each multiplexer. You can write "none" for the multiplexers that are not used for this instruction.(a) MUX1:(b) MUX2:(c) MUX3:(d) MUX4:
You are given a before condition of the registers eax, ebx, edx and an instruction. Choose the correct after condition of eax, edx Before condition: EAX: 00 00 00 11 EBX: 00 00 00 OC EDX FF FF FF 03 Instruction: CWD idiv bx After condition: EAX: 00 00 00 51 EDX: FF FF FF 01 O EAX: 00 00 05 01 EDX: FF FF FF 03 EAX: 00 00 00 01 EDX: 00 00 00 05 O EAX: 00 00 00 01 EDX: FF FF 00 05
Read the Assembly program carefully, understand its working/functionality and answer the below given question. MOV DX, 0090 MOV DS, DX MOV BX, 0010 MOV SI, 0020 MOV AL,00 MOV DL, [SI] MOV CX, 000AP1: CMP DL, [BX] JNZ P2 ;JNZ is Jump if ZF=0 in the result of CMP instruction INC ALP2: INC BX INC SI DEC CX MOV DL, [SI] CMP CX, 0 JA P1 MOV [0030], AL INT E0090:0010 DB B8, 6F, 23, D0, 99, C5, 89, 9D, 1A, 810090:0020 DB 37, 6F, 32, B6, 11, C5, 98, 2B, 7A, C0 a. What will be displayed on the LCD after the execution of program?
(d) The table below shows the ALUcontrol signal of the datapath we discussed in class. Instruction Funct ALU Орсode ALUop ALU action operation field control Iw 00 load word XXXXXX add 0010 Sw 00 store word XXXXXX add 0010 beq 01 branch equal subtract 0110 XXXXXX R-type 10 add 100000 add 0010 R-type 10 subtract 100010 subtract 0110 R-type 10 AND 100100 AND 0000 R-type 10 OR 100101 OR 0001 R-type 10 set on less than 101010 set on less than 0111 You want to add the bne instruction into the datapath, which already includes the required hardware for the instruction. Write out the ALUop for bne and how you can determine whether the bne results in the branch to be taken.
Write an instruction to sum of the values 9AH, 29H and F4H.Put the sum in registers RO (low byte) and R7 (high byte). (C5) Find the time delay for the delay subroutine shown to the right, if the system has an 8051 with frequency of 11.0592 MHz (C4) DELAY: AGAIN: MOV R2, #150 MOV R3, #250 NOP NOP NOP DJNZ R3, HERE DJNZ R2, AGAIN RET
BX=FFFF, after instruction INC BX is executed, CF ||
Suppose that we are developing a new version of the AMD Barcelona proces- sor with a 4 GHz clock rate. We have added some additional instructions to the instruction set in such a way that the number of instructions has been reduced by 15% from the values shown for each benchmark in Exercise 1.12. The execution times obtained are shown in the following table. a. Name Execution Time (seconds) Reference Time (seconds) bzip2 700 9650 SPECratio 13.7 1.13.2 [10] In general, these CPI values are larger than those obtained in previous exercises for the same benchmarks. This is due mainly to the clock rate used in both cases, 3 GHz and 4 GHz. Determine whether the increase in the CPI is similar to that of the clock rate. If they are dissimilar, why?
1. Given the assembly language program below, run it and list the flags’status after each instruction. PROGRAM OF(OV) SF(PL) ZF(ZR) AF(AC) PF(PE) CF(CY) 0 0 1 0 1 0 mov ax, 8h add ax, 8h sub ax, 10h add ax, 112 neg ax mov bh,6Ch add bh,95h mov al, 2 sub al, 3 2. What will be the values of the Overflow flag in the program givenbelow? mov al,80hadd al,92h ; AL = ______ , OF = _____mov al,-2add al,+127 ; AL = ______ , OF = _____ 3. Define the following arrays: a. A byte type array named DONKEY with 3 items 45, 45h and4Ah. b. A word type array named FIONA with 5 items 45, 45h, 444h,4A4Bh and 44Ah. a. A double-word type array named SHREK with 5 itemsinitialized to 0 4. Referring to the array definitions in Question 3, state the following values in the register a. MOV AL,DONKEY ;AL= b. MOV AL, DONKEY+2 ;AL= c. MOV AX, FIONA ;AX= d. MOV AX,…
1.The Instruction that sets all odd bits (D0, D2, D4, ... ) of register r1 to one and keeps its even bits unchanged is: Group of answer choices A.ORR r1, r1, #0x55555555 B.ORR r1, r1, #0xAAAAAAAA C.AND r1, r1, #0x55555555 D.ORR r1, r1, #0x01010101 2. Suppose Mask = 0x00000F0F and P = 0xDCBADCBA. What is the result of the following bitwise operation? Q = ~Mask Group of answer choices a. Q = 0xFFFFF0F0 b. Q = 0x00000F0F c. Q = 0x00000C0A d. Q = 0xDCBAD0B0
You must show all work for every problem that requires it. The point values for problems may be changed at the professor's discretion. Read each question carefully and follow the instructions. A computer hardware as the following latency for its instructions in Pico seconds: Type Instruction Memory Register Read ALU Operation Data Memory Register Write Total R-Format 250 150 200 0 20 620 lw 250 150 200 250 20 870 sw 250 150 200 250 0 850 beq 250 150 200 0 0 600 J 250 0 0 0 0 250 For a single-cycle implementation what Clock Rate does the machine needs to operate at? For a multi-cycle implementation what Clock Rate does the machine needs to operate at? Provide the type, assembly language instruction and binary representation of instructions described by the following MIPS fields: Op=0x0, rs=3, rt=2, rd=3, shamt=0, funct=34 Op=0x23, rs=3, rt=1, const=0x4 In the snippet of assembly code below, how many times is…
Write down the values of destination operands and flags after the execution of each instruction: code 1 mov cx, sub cx, 1 ; (a) CX = ? ZF = ? mov cx, sub cx, 1 ; (b) CX = ? SF = ? mov al, 0FFH add al, 1 ; (c) AL = ? CF = ? mov al, 0 sub al, 1 ; (d) AL = mov al, 7Fh add al, 1 ; (e) AL = ? CF = ? ? OF = ? mov al, -128 neg al ; (f) CF = ? OF = ?
1. T/F - if (B)=006000 (PC)=003600 (X)=000090, for the machine instruction 0x032026, the target address is 003000.2. T/F – PC register stores the return address for subroutine jump.3. T/F – S register contains a variety of information such as condition code.4. T/F – INPUT WORD 1034 – This means Operating system should reserve 1034 bytes in memory5. T/F - In a two pass assembler, adding literals to literal table and address resolution of local symbol are done using first pass and second pass respectively.