H.W: Draw a logic diagram to implement the following register transfers:(a) If the content of the 8-bit register R is odd, thenххог уelse x -x.y (logic AND)Assume x and y are 8 bits wide.(b) If the number in the 8-bit register R is negative, then x- x-1else x - x+1. Assume x and y are 4 bits wide.

H.W: Draw a logic diagram to implement the following register transfers: (a) If the content of the 8-bit register R is odd, then -X xor y else x -x.y (logic AND) Assume x and y are 8 bits wide. (b) If the number in the 8-bit register R is negative, then x– x-1 else x - x+1. Assume x and y are 4 bits wide.

H.W: Draw a logic diagram to implement the following register transfers: (a) If the content of the 8-bit register R is odd, then -X xor y else x -x.y (logic AND) Assume x and y are 8 bits wide. (b) If the number in the 8-bit register R is negative, then x– x-1 else x - x+1. Assume x and y are 4 bits wide.

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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H.W: Draw a logic diagram to implement the following register transfers: (a) If the content of the 8-bit register R is odd, then X xor y else x x.y (logic AND) Assume x and y are 8 bits wide. (b) If the number in the 8-bit register R is negative, then x-x-1 else x - x+ 1. Assume x and y are 4 bits wide.
Design a simple ALU. There are 2 inputs, A and B, and each one is stored in 16-bit register and a 3-bit opcode. The output is a 17-bit register Y. The opcode controls ALU functions as follows: Opcode Function 000 001 010 011 100 101 110 111 Operation Y <= A Y <= A + B Y<=A-B Y <= A AND B Y <= A OR B Y <= A + 1 Y<=A-1 Y <= B A Add Subtract AND OR Increment A Decrement A B Write the full VHDL code for your design use your student ID as name of your top-level entity Hint: use multiplexer and simple logic and arithmetic assignments.
1. Implement a 4-bit register which performs the operations below. Give a function table which describes how your control signals work, and clearly label all inputs and outputs. a. load a value L3:0 b. shifts Q3 toward Q0 c. hold (no change) d. behaves like an up-counter
Assume we have a 16-bit Arithmetic Logic Unit (ALU) that has three inputs and three outputs. List the inputs and outputs in binary for the ALU if we are using it to determine if X = 2510 < Y = 3210. The ALU. Use 16 bits or 1 bit to represent the inputs and outputs as appropriate. The value for ALU operation will be (11)2 for Set on Less Than.
Q2. Design a control logic to implement the following register transfer statements assuming that A,B,C and Z are 4-bit registers: if Z not equal zero then if Z is even then A B OR C else A (B AND C) Lelse A-A-I
The instruction used to fill DX with the its sign bit is: * CWD SAR DX, 1 SAR DX, SF SHR DX, CL SHR DX, SF SAR DX, 10 SAR DX, [SF] SAR DX, 16
Design all operations of the ALU independently. There are a total of 8 operations. All operations are 4 bit. · F=A+B with Carry in and Carry out · F=B-A with Borrow In and Borrow out · F=A-B with Borrow In and Borrow out - F=2xAwith a flag for overflow - F=A/2 with a flag for overflow · F=AxB with overflow · F=AXORB (Bitwise XOR) · F= A< B (F = 1 if true, F=0 otherwise)
Q2. Design a control logic to implement the following register transfer statements assuming that A.B.C and Z are 4-bit registers: if Z not equal zero then if Z is even then A BOR C else A (B AND C) Lelse A A-1
(d) The table below shows the ALUcontrol signal of the datapath we discussed in class. Instruction Funct ALU Орсode ALUop ALU action operation field control Iw 00 load word XXXXXX add 0010 Sw 00 store word XXXXXX add 0010 beq 01 branch equal subtract 0110 XXXXXX R-type 10 add 100000 add 0010 R-type 10 subtract 100010 subtract 0110 R-type 10 AND 100100 AND 0000 R-type 10 OR 100101 OR 0001 R-type 10 set on less than 101010 set on less than 0111 You want to add the bne instruction into the datapath, which already includes the required hardware for the instruction. Write out the ALUop for bne and how you can determine whether the bne results in the branch to be taken.
Show an image of the completed 8 BIT ALU The most important and possible most difficult component to implement is the arithmetic logic unit. Thefunctions of the ALU are shown in Table 1. The ALU should have 5 inputs (A-input, B-input, F0-input, F1-input, Finput) and 1 output (C-output). You will need to determine how many bits each input and output should have.Remember, you are designing an 8-bit microprocessor! To achieve the specified ALU functions, think aboutwhich digital logic component(s) you can use to accomplish the task. For example, to add the value on the A-bus8-bit ALUto the value on the B-bus, you can simply use an 8-bit adder. Explore the components in Logisim! Additionally,you can think about using a multiplexer to determine which ALU function will be performed
computer engineering: PLEASE HELP Design a 4-bit 2’s complement format adder/subtractor circuit that is also capable of indicating the occurrence of an overflow condition. The circuit has two 4-bit inputs, P and S, and a 1-bit input Op. The value of Op specifies whether the operation to be carried out is addition or subtraction. The outputs for the circuit are R (4-bit wide) and Ov (1-bit wide; Ov =1 indicates the occurrence of an overflow during the addition/subtraction process and Ov = 0 indicates that there is no overflow). Verify your design’s functionality with Multisim by performing both P + S operation as well as the P − S operation for each of the following pairs of P and S values: P = 0000 and S=0000 (i.e. P = 010 and S = 010) P = 0110 and S=0100 (i.e. P = 610 and S = 410) P = 1110 and S=1000 (i.e. P = −210 and S = −810) P = 1000 and S=0100 (i.e. P = −810 and S = 410) (Eight cases in total: Four P+S cases and four P-S cases). As an example, when P = −2 and S= −8 as in the…
Draw the control unit and datapath for the following algorithm that returns an integer value. The function takes two points (x1, y1) and (x2, y2) and computes the equation for a line. It then evaluates and returns ynew for the parameter xp using that line. Use a 16-bit data bus. Show your work; label and clearly mark your diagram. Do not implement this in VHDL. int PredY(int x1, int y1, int x2, int y2, int xp) { int m, b, ynew; if (x1 – x2) <> 0 { m = (y1 - y2) / (x1 - x2); b = y1 - m * x1; ynew = m * xp + b; return(ynew); } else { return(65535); // that's a 16-bit FFFF } }