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b) Design a PLL circuit (Find R₁ and C₂) shown below for fo = 14kHz and f = 60Hz and assume C₁ = 10nF. Input V 10 2 9 8 C₂ 0.001 µF NE/SE-565 7 6 4 5 1 -Vcc=+10 V C₂ VEE=-10 V Demodulated output Reference output VCO output

b) Design a PLL circuit (Find R₁ and C₂) shown below for fo = 14kHz and f = 60Hz and assume C₁ = 10nF. Input V 10 2 9 8 C₂ 0.001 µF NE/SE-565 7 6 4 5 1 -Vcc=+10 V C₂ VEE=-10 V Demodulated output Reference output VCO output

Introductory Circuit Analysis (13th Edition)
Introductory Circuit Analysis (13th Edition)
13th Edition
ISBN:9780133923605
Author:Robert L. Boylestad
Publisher:Robert L. Boylestad
Chapter1: Introduction
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Problem 1P: Visit your local library (at school or home) and describe the extent to which it provides literature...
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b) Design a PLL circuit (Find R₁ and C₂) shown below for fo = 14kHz and fc = 60Hz and assume C₁ = 10nF. Input V 10 8 C3 0.001 μF NE/SE-565 7 6 4 5 1 -Vcc=+10 V C₂ VEE=-10V Demodulated output Reference output VCO output
Transcribed Image Text:b) Design a PLL circuit (Find R₁ and C₂) shown below for fo = 14kHz and fc = 60Hz and assume C₁ = 10nF. Input V 10 8 C3 0.001 μF NE/SE-565 7 6 4 5 1 -Vcc=+10 V C₂ VEE=-10V Demodulated output Reference output VCO output
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