A sequential circuit with two D flip-flops A and B, one input Y, and one output Z is specified by the following input equations: DA = BY + AY, DB = Y, Z = AB (a) Draw the logic diagram of the circuit. (b) Derive the state table. (c) Derive the state diagram. (d) Is this a Mealy or a Moore machine?
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- 4-6. A sequential circuit with two D flip-flops A and B and input X and output Yis specified by the following input equations: Y = A + B D = X + B D = XA (a) Draw the logic diagram of the circuit. (b) Derive the state table. (c) Derive the state diagram. (d) Is this a Mealy or a Moore machine?Electrical Engineering Task Figure shows a BCD counter that produces a four-bit output representing the BCD code for number of pulses that have been applied to the counter input. In particular, the DCBA outputs will never represent a number greater than 1001,-91, (MOD-10). (MSB) Logic BCD counter circuit HIGH only when DCBA=210-310, or 910 a. Draw the logic circuit using the minimum expression and then explain its operation. BDesign a logic circuit with four inputs and one output that will produce "l" in the output only if the input patterns have odd number of zeros. a) Write the Boolean equation for the circuit in the simplest SOP form. b) Draw the logic circuit for the above equation in its simplest form. c) Re Design the logic circuit using NANI) gates only?
- Design a combinational circuit with the four inputs A,B.C, and D, and three outputs X, Y, and Z. When the binary input is odd number, the binary output is one lesser than the input. When the binary input is even number the binary output is one greate than the input. Implement the function using multiplexers with minimal input and select line.A sequential circuit with two D flip-flops A and B, two inputs X and Y, and one output Z is specified by the following input equations: XA + XY, DB = XB + XA, Z = XB DA = (a) Draw the logic diagram of the circuit. (b) Derive the state table. (c) Derive the state diagram. (d) Is this a Mealy or a Moore machine?An asynchronous state machine has two inputs (X1 and X2) and one output (Z). The output is the same of the previous value if (X2=0) and (Z) equals to the value of (X1) if (X2=1). The designer needs for . . SR-flip ..... .... flops to construct the state machine. * O 2
- Question - 5: Discuss the Moore's and Mealy finite state machines by mentioning their advantages and disadvantages over each other. Question – 6: Design a 3-bit up-counter using finite state machines.1. The synchronous finite state machine (FSM) with input X and output Z consisted of two D-flip-flops with positive edge triggering and asynchronous clear (Figure 1). The flip-flop input excitation and output forming logic were implemented with 2-to-1 multiplexers (note that in the multiplexer symbols data inputs DO are shown above inputs D1). Obtain the following: a) Excitation equations for flip-flop inputs (Q1*, Q0*) and the equation for output Z. b) Output type (Moore/Mealy). c) State table: next states (Q1*, Q0*) as functions of present states (Q1, QO) and X, show output Z values. d) State diagram: show output Z values. e) Output Z sequence for input sequence X = 1111110000. The flip-flops were cleared initially. f) An estimate of the maximum clock frequency for reliable operation. The setup time and D to Q propagation time are 6 and 55 ns, respectively. The multiplexer delays are 36 ns and 47 ns for Data and Select inputs, respectively. Assume a 10 ns delay for the inverter.…1) Is it a Mealy machine or Moore machine? 2) Derive simplified expressions for Output z, and next state FF outputs y1+ and y2+ in terms of input w, and present state y1 and y2. Simplify using Boolean manipulation. You need not name specific Boolean properties/Theorems used. Leave final answers in simplest SoP/PoS forms. 3) Derive its encoded State-Transition Table. 4) Using the encoded State-Transition Table from part c, derive the symbolic state-transition table. Define your states. Use S0, S1, S2, and so on for state names. 5) Draw state diagram with all states and all transitions shown clearly. 6) What sequence of input values on wire w is detected by this circuit?
- The state diagram of a Moore machine is shown below. This machine has one input (a), if we design its circuit by using two D-Flip Flops, which option will be the flip flops input equations? 9,9, = 00 01 1 10 Select one: O a. D1= Q1Q0' + Q1a, DO= Q1a' + Q1'a O b. D1=Q1'Q0 + Q1a' , D0=Q0a' + Q0'a O c. D1=Q1Q0' + Q1'a , D0=Q1' + Q0a' O d. None O e. D1= Q1'Q0 + Q1a' , D0= Q1a' + Q1'ai) Minimize the logic expression Y = BC + AC + AB using Boolean Algebra rules (Pleaseshow the steps). ii) Draw the simplified logic circuit based on the minimum expression obtained from (i).Design a combinational circuit using multiplexer for a car chime based on thefollowing system: A car chime or bell will sound if the output of the logic circuit(X) is set to a logic ‘1’. The chime is to be sounded for either of the followingconditions:• if the headlights are left on when the engine is turned off and• if the engine is off and the key is in the ignition when the door is opened.Use the following input names and nomenclature in the design process:• ‘E’ – Engine. ‘1’ if the engine is ON and ‘0’ if the engine is OFF• ‘L’ – Lights. ‘1’ if the lights are ON and ‘0’ if the lights are OFF• ‘K’ – Key. ‘1’ if the key is in the ignition and ‘0’ if the key is not in the ignition• ‘D’ – Door. ‘1’ the door is open and ‘0’ if the door is closed• ‘X’ – Output to Chime. ‘1’ is chime is ON and ‘0’ if chime is OFF