A main memory unit with a capacity of 4 megabytes is built using 1Mx 1-bit DRAM chips.Each DRAM chip has 1K rows of cells with 1K Cells in each row. The time taken for a single refresh operation is 100 nanoseconds. The time required to perform one refresh operation on all the cells in the memory unit?

Systems Architecture
7th Edition
ISBN:9781305080195
Author:Stephen D. Burd
Publisher:Stephen D. Burd
Chapter5: Data Storage Technology
Section: Chapter Questions
Problem 2PE
icon
Related questions
Question

A main memory unit with a capacity of 4 megabytes is built using 1Mx 1-bit DRAM chips.Each DRAM chip has 1K rows of cells with 1K Cells in each row. The time taken for a single refresh operation is 100 nanoseconds. The time required to perform one refresh operation on all the cells in the memory unit?

Expert Solution
steps

Step by step

Solved in 2 steps with 1 images

Blurred answer
Knowledge Booster
Fundamentals of Input and Output Performance
Learn more about
Need a deep-dive on the concept behind this application? Look no further. Learn more about this topic, computer-science and related others by exploring similar questions and additional content below.
Similar questions
  • SEE MORE QUESTIONS
Recommended textbooks for you
Systems Architecture
Systems Architecture
Computer Science
ISBN:
9781305080195
Author:
Stephen D. Burd
Publisher:
Cengage Learning
Principles of Information Systems (MindTap Course…
Principles of Information Systems (MindTap Course…
Computer Science
ISBN:
9781285867168
Author:
Ralph Stair, George Reynolds
Publisher:
Cengage Learning
MIS
MIS
Computer Science
ISBN:
9781337681919
Author:
BIDGOLI
Publisher:
Cengage