A) If (10n01)2=(33)r, find n, r. B) Given A. Decide whether B + AB=1 is True or False. Confirm your decision. C) Write the output expression of the following logic circuit as the sum of products (Sum of Products, SP).
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- Excess-3 code is significant for arithmetic operations as it overcomes shortcoming encountered while using 8421 BCD code to add two decimal digits whose sum exceeds 9. Excess-3 arithmetic uses different algorithm than normal non-biased BCD or binary positional number system. An electronics company has hired your services to design a code converter that converts Binary Coded Decimal (BCD) code for it. Design the converter.Implement the equation F = ab +ac using a multiplexer and logic gates.An 8085 microprocessor executes the following instructions: Two numbers are represented in signed 2's complement form as P = 11101101 and Q = 11100110 If Q is subtracted from P, the value obtained in %3D signed 2's complement form is
- Design a logic circuits w/ 4inputs (A(MSB), B,C,D(L,S,B)) and 1 output x. The 4 inputs represent switches in a vending machine. The switches can be either open (0) or closed (1) The X output becomes high if and only there are two or more switches closed at the same time. Furthermore it is impossible for the first A and the last switch D to be closed at the same time. Reqd: 1.) complete and labeled truth table 2.) canonical sop form expression 3.) grouped kmap 4.) minimum SOP expression(a) A logic circuit shown in Figure Q.3 has a 4-bit input A and B, three 4-bit wide 2:1 muxes, a 4-bit adder, a 4-bit output F, and a carry flag C. For the given Table Q.3, fill in the value of output F and carry flag C for the given value of A, B, S0, S1 and S2. 51 52 1001 Flag C 0011 Figure Q.3 Table Q.3 A So S1 S2 F Flag C 0001 1000 0010 1001 1 1 0011 1101 0100 1101 1110 0111 1Electrical Engineering Verilog Design N-bit binary counter which counts the number from 0 to 2N-1. After reaching to maximum count i.e. 2N-1, it again starts the count from 0. i. Write the description of the counter in Verilog ii. Generate the design from the listing ii. Produce the waveforms of the counter
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- This is a logic design problem. Thanks for help. Design a counter that counts as 0, 2, 1, 3 and repeats.Implement the following Q1 using gate-level modeling and Q2 by any of the three modeling techniques (Gate-level modeling, dataflow modeling, behavioural modeling, or even a mix of different modeling techniques). Question 1 Q1. Write a Verilog program for logic equation: F= XY'Z'+ XY'Z+XYZ1. Given the Boolean expression (b + d)(a’+ b’ + c),a. Convert the expression to the other standard form. What do you call this standard form?b. Derive its canonical form. What do you call this canonical form?c. Derive the other canonical form. What do you call this canonical form?d. Provide the truth table of the expressione. Draw the logic circuit diagrams of the 2 standard forms