[1.1] Consider the following instruction: or rd, rs1, rs2 Instruction: Interpretation: Reg[rd] = Reg[rs1] AND Reg[rs2] a. What are the values of control signals generated by the control in the Figure below for this instruction' b. Which resources (blocks) perform a useful function for this instruction? c. Which resources (blocks) produce no output for this instruction? Which resources produce output that not used?

Computer Networking: A Top-Down Approach (7th Edition)
7th Edition
ISBN:9780133594140
Author:James Kurose, Keith Ross
Publisher:James Kurose, Keith Ross
Chapter1: Computer Networks And The Internet
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Problem R1RQ: What is the difference between a host and an end system? List several different types of end...
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Building a Datapath
[1.1] Consider the following instruction:
Instruction:
Interpretation:
i or rd, rs1, rs2
Reg[rd] = Reg[rs1] AND Reg[rs2]
a. What are the values of control signals generated by the control in the Figure below for this instruction?
b. Which resources (blocks) perform a useful function for this instruction?
c. Which resources (blocks) produce no output for this instruction? Which resources produce output that is
not used?
Read
register 1
4ALU operation
Read
data 1
MemWrite
Read
register 2
Registers Read
MemtoReg
Zero
ALU ALU
result
Instruction
ALUSrc
Read
data
Write
Address
data 2
register
Write
data
Data
RegWrite
Write
data
memory
MemRead
Imm
Gen
Transcribed Image Text:Building a Datapath [1.1] Consider the following instruction: Instruction: Interpretation: i or rd, rs1, rs2 Reg[rd] = Reg[rs1] AND Reg[rs2] a. What are the values of control signals generated by the control in the Figure below for this instruction? b. Which resources (blocks) perform a useful function for this instruction? c. Which resources (blocks) produce no output for this instruction? Which resources produce output that is not used? Read register 1 4ALU operation Read data 1 MemWrite Read register 2 Registers Read MemtoReg Zero ALU ALU result Instruction ALUSrc Read data Write Address data 2 register Write data Data RegWrite Write data memory MemRead Imm Gen
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