Just need answer The system is byte-addressable and the block size is one word (4 bytes). The tag and line numberare represented with a binary numbers. The contents of words in the block are represented withhexadecimal.TagLineNumber101000 01100100 11011001101000 01100100 11101001101000 01100100 11111001101000 01110100 00001101Word within block00 01 10 1120166116 C116 211632167216C216D216421682164116 A216E21692165216 B216 1. What is the size of the main memory of this system?2. What is the size of the cache memory of this system?3. If the CPU requests to read memory address A1 25 BA, what data does the CPU receive?4. If the CPU requests to read memory address A1 35 C2, what data does the CPU receive?5. If we access memory in the following order in cache system A:A1 FF B8B1 FF B8A1 FF B8B1 FF B8A1 FF B8B1 FF B8how many cache misses would occur for the data request?

A direct-mapped cache can be defined in such a way that it is a selected type of cache system…

1. What is the size of the main memory of this system? 2. What is the size of the cache memory of this system? 3. If the CPU requests to read memory address A1 25 BA, what data does the CPU receive? 4. If the CPU requests to read memory address A1 35 C2, what data does the CPU receive? 5. If we access memory in the following order in cache system A: A1 FF B8 B1 FF B8 A1 FF B8 B1 FF B8 A1 FF B8 B1 FF B8 how many cache misses would occur for the data request?