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- For the circuit shown below, determine the Boolean functions at point X and Y as well as the output Z. Write Z as minimum sums of products SoP. 3-to-8 decoder 1 b- A 4-to-1 MUX Io 3 В 1 Z 4 b- I2 I3 C, Co 6 b- C- АВ 1. 2.Find the truth table that describes the following circuit: X-Design a combinational circuit whose input is a 4-bit number, and output is a 4-bit number. if the input number is between 1-9 the output will be the number at the same position in your student ID. For example, if your student id is 220311299 a₁ 2 ● 82 2 • ● ● a3 0 a4 3 as 1 as 1 a7 2 as Use only NAND Gates. You should use your correct student id to solve this question. Show all your steps. 9 When the binary input jis 1, 2, 3,4,5,6,7,8, or 9 you will output the BCD value of the number at that position a, as shown above. • If the input j is 0,10,11,12,13,14, or 15 the output will be (don't care). ag 9
- (Logic Gates:* 7404LS (NOT)* 7408LS (AND)* 7432LS (OR)* 7400LS (NAND)* 7402LS (NOR)* 7486LS (EX-OR)* Decoder 74hc138Or you can use 74HCxx versions.) Task 3: Design a Binary Ripple Carry Adder for 5+3 summation in BCDcoding system. Draw the the circuit diagram by using FullAdder Blocks. Simulate the circuit.Find the truth table that describes the following circuit:DESIGN A CIRCUIT THAT SUBTRACTS B= b3b2b1b0 FROM A= a3a2a1a0 using the IC 74283. ASAP
- Construct the XOR operator using only NAND gates. Hint:x XOR y = ((x′y)′(xy′)′)′Design a combinational circuit that accepts three inputs, x, y, and z, and produce three outputs, A, B, and C. When the binary input is smaller than 6 the binary output is three greater than the input. Otherwise, the binary output is one greater than the input. Impalement the output using a 3 x 8 decoder. Ans: Truth table К-Мар y Z А В C yz A = yz В — yz C = Combinational circuitUse a Karnaugh map to simplify the following standard SOP expression:XY'Z + XYZ' + X'YZ + X'YZ' + XY'Z' + XYZ
- Implement the sequential circuit with the state diagram given using D Flip-Flop elements and 8x1 MUX elements and a minimum number of NOT gates. 01 00 10 01/00 B 00/11 01/10 10/01 11/00 11/00 00 11 sequential circuitDetermine the final output states over time for the following circuit, built from D-type gated latches: D Q A Output E E B A Gad B Gad Output GadUsing xilinx design the circuit described below: • Circuit takes in 3 inputs, a,b,c Outputs 1 when a is 1 but b is 0 Outputs 1 when b and c are both 1 Outputs 0 in all other cases. Design this circuit using a combination of the basic AND, OR or NOT gates. Repeat this design usung a multiplexor or a decoder. n D